• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 82 subscribers
  • Views 1357 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28388D: Interrupt Nesting: Execution of nested Interrupts as per priority.

sakare saikumar
Prodigy 110 points

Part Number: TMS320F28388D

Hi ti,

I am using TMS320F28388D controller in my application.

I am using 3 interrupts from PIE group 1 i.e., ADCA1, ADCB1 and TIMER0. Timings for the interrupts are

ADCA1--25 microsec

ADCB1--200 microsec

TIMER0 --1 millisec

I am enabling the nested interrupts inside ADCB1 and TIMER0 interrupt for GROUP 1 by using the below piece of code.

ISR funtion {


IER |= 0x01;
IER &= 0x01;
PieCtrlRegs.PIEACK.all = 0x0001;
asm(" NOP");
EINT;

//ISR code execution

DINT;

}

Now in my testing what i have observed is that ADCB1 interrupt is getting preempted by TIMER0 interrupt even though the Priority of ADCB1 is higher than TIMER0.

Can you check this scenario once and please let me know as soon as possible.

Thank you.

  • +1
    TI__Mastermind 19795 points

    Hi Sakare,

    Thanks for your question. If you are using the same code for BOTH ADCB1 and TIMER0, then the issue here is actually whichever occurs LAST will be the one to execute. Basically, with the code shown, both interrupts allow anything else in Group 1 to interrupt itself. So for your code, what is probably happening is:

    ADCB1 enters the ISR.

    ADCB1 immediately allows EVERYTHING from group 1 to interrupt it.

    TIMER0 now occurs, and because we're already in ADCB1 (and servicing it), the PIE allows it right through.

      

      

    So the solution in this case is to prevent anything in Group 1 of lower priority to occur WITHIN ADCB1. So basically, you need to also modify the PIEIER, not just the IER. And set it so that only interrupts higher than ADCB1 are allowed to occur.

    Something like:

            PieCtrlRegs.PIEIER1.all &= 0x0001;    // Set group priority by adjusting PIEIER1 to allow INT1.1 to interrupt current ISR
        PieCtrlRegs.PIEACK.all = 0xFFFF;      // Enable PIE interrupts

    Regards,

    Vince

  • 0 in reply to Vince
    Prodigy 110 points

    Hi Vince,

    Thanks for your quick response.

    I tried the solution whatever you told, it is working fine.