TMS320F28379D: multi ADC initialization interrupt

rajesh beesetty

Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE

Hello Experts

I am working on TMS320F28379D and exploring several peripherals. I am trying to acquire analog channels of different ADCs. I initialised all the 4 ADCs in burst mode and distinct channel is associated to the SOCs (ex: SOC0 to Ch0, SOC1 to Ch1 etc..). EPwm1is selected as the trigger source for all the SOCs of ADCs. But I see only ADC-D interupt sub routing (ISR) is being executed. Likewise, if 3 ADCs are initialized, only ADC-C ISR is being executed and so on. I observed that if any single ADC is initialised keeping other ADCs OFF, I could see the the corresponding ISR is being executed . The problem arises only when all are initialized.

In addition to this issue, i'd like to know how to enable the interrupt for ADC burst mode. Although in the above paragraph, I mentioned that ISR is being called, but I haven't enabled the interrupt for the BURST mode anywhere. In other words, for instance, if 5 SOCs are selected to get executed in burst mode for an ADC, how to generate an interupt upon completion of all the 5 SOCs. I guess the EOC-5 shall be selected as the source in the ADCINTSEL1N2 in the INT1SEL bit. Kindly confirm!

Regards,

Rajesh BN.

over 2 years ago

0 Meghavi Tank over 2 years ago

TI__Intellectual 1270 points

Hi Rajesh,

This thread is assigned to an expert who will respond to it shortly.

Meanwhile you can look into the ADC example: adc_ex12_burst_mode_epwm from this path: C:\ti\C2000Ware_4_02_00_00\driverlib\f2837xd\examples\cpu1\adc to generate an interrupt at the end of different burst.

Regards,

Meghavi

0 Benjamin Collier over 2 years ago

TI__Mastermind 36526 points

Hi Rajesh,

If you are using ADC burst mode and you want to trigger a single ISR at the end of the conversions, you are correct in thinking that you will need to trigger your ISR with the EOC signal from the last conversion.

To discuss your first issue, you should be able to trigger all of your ISRs from different ADCs. Did you start your project from one of the C2000WARE examples or did you start from scratch?

Best Regards,

Ben Collier

0 rajesh beesetty over 2 years ago in reply to Benjamin Collier

Expert 1335 points

Hi Collier,

I've done from scratc. I've initialised Timer Interrupts, 4 ADC interupts. Individually ADC ISR is being called but when all the ADC are initialized only ADC-D is being called. This is the issue I'm facing. I'll attach the program so can have a look.

Regards,

Rajesh BN.

0 Benjamin Collier over 2 years ago in reply to rajesh beesetty

TI__Mastermind 36526 points

Hi Rajesh,

Ok, I will be interested to see your program. Please let me know if you would like to share it privately.

Best Regards,

Ben Collier

0 rajesh beesetty over 2 years ago in reply to Benjamin Collier

Expert 1335 points

#include "F28x_Project.h"

interrupt void timer_ovf_isr(void);
interrupt void adcAisr(void);
interrupt void adcBisr(void);
interrupt void adcCisr(void);
interrupt void adcDisr(void);

void TimerInit();
void PwmInit();
void Initgpio();
void adcinit();
int i,a,b,c,d=0;
float
a0,a1,a2,a3,a4,a5,b0,b1,b2,b3,b4,b5,c2,c3,c4,c5,d0,d1,d2,d3,d4,d5=0;

void main(void)
{

     InitSysCtrl();
     InitGpio();
     TimerInit();
     PwmInit();
     Initgpio();
     adcinit();

     DINT;
     InitPieCtrl();
     InitPieVectTable();

     EALLOW;
     PieVectTable.ADCA1_INT = &adcAisr;
     PieVectTable.ADCB1_INT = &adcBisr;
     PieVectTable.ADCC1_INT = &adcCisr;
     PieVectTable.ADCD1_INT = &adcDisr;
     PieVectTable.TIMER0_INT = &timer_ovf_isr;
     EDIS;

     PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
     PieCtrlRegs.PIEIER1.bit.INTx1 = 1;
     PieCtrlRegs.PIEIER1.bit.INTx2 = 1;
     PieCtrlRegs.PIEIER1.bit.INTx3 = 1;
     PieCtrlRegs.PIEIER1.bit.INTx6 = 1;

     PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
     IER |= 0x0001;
     EINT;          // Enable Global interrupt INTM
     ERTM;          // Enable Global realtime interrupt DBGM

     CpuTimer0Regs.TCR.bit.TSS = 0;
     while(1)
     {

     }

}

void TimerInit(void)
{


        CpuTimer0Regs.PRD.bit.LSW = 0x00FF;
        CpuTimer0Regs.PRD.bit.MSW = 0x002F;
        CpuTimer0Regs.TPR.bit.TDDR = 0x001F;
        CpuTimer0Regs.TCR.bit.TIE = 1;
        CpuTimer0Regs.TCR.bit.TRB = 0;
        CpuTimer0Regs.TCR.bit.TSS = 1;
        CpuTimer0Regs.TCR.bit.FREE = 0;
}

void timer_ovf_isr(void)

{
        i=i+1;
        GpioDataRegs.GPCTOGGLE.bit.GPIO73 = 1;
        GpioDataRegs.GPCTOGGLE.bit.GPIO74 = 1;
        CpuTimer0Regs.TCR.bit.TIF = 1;
        PieCtrlRegs.PIEACK.all = 0x0001;
}

void PwmInit(void)
{
           EPwm1Regs.TBCTL.bit.CTRMODE = 0;             // Count up
           EPwm1Regs.TBPRD = 5000;                    // Set timer period
           EPwm1Regs.TBCTL.bit.PHSEN = 0;               // Disable phase
loading
           EPwm1Regs.TBPHS.bit.TBPHS = 0x0000;          // Phase is 0
           EPwm1Regs.TBCTR = 0x0000;                    // Clear counter
           EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;           // Clock ratio to
SYSCLKOUT
           EPwm1Regs.TBCTL.bit.CLKDIV = 0;
           EPwm1Regs.TBCTL.bit.SYNCOSEL = 1;            // SYNC output on CTR =
0
           // Setup shadow register load on ZERO
           EPwm1Regs.CMPCTL.bit.SHDWAMODE = 0;
           EPwm1Regs.CMPCTL.bit.SHDWBMODE = 0;
           EPwm1Regs.CMPCTL.bit.LOADAMODE = 0;
           EPwm1Regs.CMPCTL.bit.LOADBMODE = 0;
           // Set Compare values

           // Set actions
           EPwm1Regs.AQCTLA.bit.ZRO = 2;                // Set PWM1A on Zero
           EPwm1Regs.AQCTLA.bit.CAU = 1;                // Clear PWM1A on event
A, up count

           EPwm1Regs.ETSEL.bit.SOCAEN  = 0;            // Disable SOC on A
group
           EPwm1Regs.ETSEL.bit.SOCASEL = 1;            // Select SOCA on period
match
           EPwm1Regs.ETSEL.bit.SOCAEN = 1;             // Enable SOCA
           EPwm1Regs.ETPS.bit.SOCAPRD = 1;             // Generate pulse on 1st
event


}

void Initgpio(void)
{

         EALLOW;
         GpioCtrlRegs.GPAMUX1.all = 0;
         GpioCtrlRegs.GPAMUX2.all = 0;
         GpioCtrlRegs.GPBMUX1.all = 0;
         GpioCtrlRegs.GPBMUX2.all = 0;
         GpioCtrlRegs.GPCMUX1.all = 0;
         GpioCtrlRegs.GPCMUX2.all = 0;
         GpioCtrlRegs.GPDMUX1.all = 0;
         GpioCtrlRegs.GPDMUX2.all = 0;

         GpioCtrlRegs.GPADIR.bit.GPIO23 = 1;
         GpioCtrlRegs.GPCDIR.bit.GPIO73 = 1;
         GpioCtrlRegs.GPCDIR.bit.GPIO74 = 1;
         GpioCtrlRegs.GPCDIR.bit.GPIO92 = 1;
         GpioCtrlRegs.GPCDIR.bit.GPIO93 = 1;

        EDIS;
}

void adcinit(void)
{       EALLOW;

        //ADC A
        AdcaRegs.ADCCTL2.bit.PRESCALE = 5;          // Set ADCCLK divider to /4
        AdcaRegs.ADCCTL2.bit.RESOLUTION = 0;        // 12-bit resolution
        AdcaRegs.ADCCTL2.bit.SIGNALMODE = 0;        // Single-ended channel
conversions (12-bit mode only)
        AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;       // Set pulse positions to
late
        AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;          // Power up the ADC
        DELAY_US(1000);                             // Delay for 1ms to allow
ADC time to power up

        AdcaRegs.ADCSOC0CTL.bit.CHSEL = 0;          // SOC0 will convert pin A0
        AdcaRegs.ADCSOC1CTL.bit.CHSEL = 1;
        AdcaRegs.ADCSOC2CTL.bit.CHSEL = 2;
        AdcaRegs.ADCSOC3CTL.bit.CHSEL = 3;
        AdcaRegs.ADCSOC4CTL.bit.CHSEL = 4;
        AdcaRegs.ADCSOC5CTL.bit.CHSEL = 5;

        AdcaRegs.ADCSOC0CTL.bit.ACQPS = 14;         // Sample window is 100
SYSCLK cycles
        AdcaRegs.ADCSOC1CTL.bit.ACQPS = 14;
        AdcaRegs.ADCSOC2CTL.bit.ACQPS = 14;
        AdcaRegs.ADCSOC3CTL.bit.ACQPS = 14;
        AdcaRegs.ADCSOC4CTL.bit.ACQPS = 14;
        AdcaRegs.ADCSOC5CTL.bit.ACQPS = 14;


        AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;        // Enable INT1 flag
        AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 5;
        AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;      // Make sure INT1 flag is
cleared

        AdcaRegs.ADCBURSTCTL.bit.BURSTEN = 1;
        AdcaRegs.ADCBURSTCTL.bit.BURSTSIZE= 5;
        AdcaRegs.ADCBURSTCTL.bit.BURSTTRIGSEL = 5; //EPWM1

        AdcaRegs.ADCSOCPRICTL.bit.SOCPRIORITY = 0;


     //ADCB

        AdcbRegs.ADCCTL2.bit.PRESCALE = 6;          // Set ADCCLK divider to /4
        AdcbRegs.ADCCTL2.bit.RESOLUTION = 0;        // 12-bit resolution
        AdcbRegs.ADCCTL2.bit.SIGNALMODE = 0;        // Single-ended channel
conversions (12-bit mode only)
        AdcbRegs.ADCCTL1.bit.INTPULSEPOS = 1;       // Set pulse positions to
late
        AdcbRegs.ADCCTL1.bit.ADCPWDNZ = 1;          // Power up the ADC
        DELAY_US(1000);                             // Delay for 1ms to allow
ADC time to power up

        AdcbRegs.ADCSOC0CTL.bit.CHSEL = 0;          // SOC0 will convert pin A0
        AdcbRegs.ADCSOC1CTL.bit.CHSEL = 1;
        AdcbRegs.ADCSOC2CTL.bit.CHSEL = 2;
        AdcbRegs.ADCSOC3CTL.bit.CHSEL = 3;
        AdcbRegs.ADCSOC4CTL.bit.CHSEL = 4;
        AdcbRegs.ADCSOC5CTL.bit.CHSEL = 5;

        AdcbRegs.ADCSOC0CTL.bit.ACQPS = 14;         // Sample window is 100
SYSCLK cycles
        AdcbRegs.ADCSOC1CTL.bit.ACQPS = 14;
        AdcbRegs.ADCSOC2CTL.bit.ACQPS = 14;
        AdcbRegs.ADCSOC3CTL.bit.ACQPS = 14;
        AdcbRegs.ADCSOC4CTL.bit.ACQPS = 14;
        AdcbRegs.ADCSOC5CTL.bit.ACQPS = 14;


        AdcbRegs.ADCINTSEL1N2.bit.INT1E = 1;        // Enable INT1 flag
        AdcbRegs.ADCINTSEL1N2.bit.INT1SEL = 5;
        AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;      // Make sure INT1 flag is
cleared

        AdcbRegs.ADCBURSTCTL.bit.BURSTEN = 1;
        AdcbRegs.ADCBURSTCTL.bit.BURSTSIZE= 5;
        AdcbRegs.ADCBURSTCTL.bit.BURSTTRIGSEL = 5; //EPWM1


        AdcbRegs.ADCSOCPRICTL.bit.SOCPRIORITY = 0;


        //ADCC

        AdccRegs.ADCCTL2.bit.PRESCALE = 6;          // Set ADCCLK divider to /4
        AdccRegs.ADCCTL2.bit.RESOLUTION = 0;        // 12-bit resolution
        AdccRegs.ADCCTL2.bit.SIGNALMODE = 0;        // Single-ended channel
conversions (12-bit mode only)
        AdccRegs.ADCCTL1.bit.INTPULSEPOS = 1;       // Set pulse positions to
late
        AdccRegs.ADCCTL1.bit.ADCPWDNZ = 1;          // Power up the ADC
        DELAY_US(1000);                             // Delay for 1ms to allow
ADC time to power up

        AdccRegs.ADCSOC0CTL.bit.CHSEL = 0;          // SOC0 will convert pin A0
        AdccRegs.ADCSOC1CTL.bit.CHSEL = 1;
        AdccRegs.ADCSOC2CTL.bit.CHSEL = 2;
        AdccRegs.ADCSOC3CTL.bit.CHSEL = 3;
        AdccRegs.ADCSOC4CTL.bit.CHSEL = 4;
        AdccRegs.ADCSOC5CTL.bit.CHSEL = 5;

        AdccRegs.ADCSOC0CTL.bit.ACQPS = 14;         // Sample window is 100
SYSCLK cycles
        AdccRegs.ADCSOC1CTL.bit.ACQPS = 14;
        AdccRegs.ADCSOC2CTL.bit.ACQPS = 14;
        AdccRegs.ADCSOC3CTL.bit.ACQPS = 14;
        AdccRegs.ADCSOC4CTL.bit.ACQPS = 14;
        AdccRegs.ADCSOC5CTL.bit.ACQPS = 14;


        AdccRegs.ADCINTSEL1N2.bit.INT1E = 1;        // Enable INT1 flag
        AdccRegs.ADCINTSEL1N2.bit.INT1SEL = 5;
        AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;      // Make sure INT1 flag is
cleared

        AdccRegs.ADCBURSTCTL.bit.BURSTEN = 1;
        AdccRegs.ADCBURSTCTL.bit.BURSTSIZE= 5;
        AdccRegs.ADCBURSTCTL.bit.BURSTTRIGSEL = 5; //EPWM1


        AdccRegs.ADCSOCPRICTL.bit.SOCPRIORITY = 0;


     //ADCD

        AdcdRegs.ADCCTL2.bit.PRESCALE = 6;          // Set ADCCLK divider to /4
        AdcdRegs.ADCCTL2.bit.RESOLUTION = 0;        // 12-bit resolution
        AdcdRegs.ADCCTL2.bit.SIGNALMODE = 0;        // Single-ended channel
conversions (12-bit mode only)
        AdcdRegs.ADCCTL1.bit.INTPULSEPOS = 1;       // Set pulse positions to
late
        AdcdRegs.ADCCTL1.bit.ADCPWDNZ = 1;          // Power up the ADC
        DELAY_US(1000);                             // Delay for 1ms to allow
ADC time to power up

        AdcdRegs.ADCSOC0CTL.bit.CHSEL = 0;          // SOC0 will convert pin A0
        AdcdRegs.ADCSOC1CTL.bit.CHSEL = 1;
        AdcdRegs.ADCSOC2CTL.bit.CHSEL = 2;
        AdcdRegs.ADCSOC3CTL.bit.CHSEL = 3;
        AdcdRegs.ADCSOC4CTL.bit.CHSEL = 4;
        AdcdRegs.ADCSOC5CTL.bit.CHSEL = 5;

        AdcdRegs.ADCSOC0CTL.bit.ACQPS = 14;         // Sample window is 100
SYSCLK cycles
        AdcdRegs.ADCSOC1CTL.bit.ACQPS = 14;
        AdcdRegs.ADCSOC2CTL.bit.ACQPS = 14;
        AdcdRegs.ADCSOC3CTL.bit.ACQPS = 14;
        AdcdRegs.ADCSOC4CTL.bit.ACQPS = 14;
        AdcdRegs.ADCSOC5CTL.bit.ACQPS = 14;


        AdcdRegs.ADCINTSEL1N2.bit.INT1E = 1;        // Enable INT1 flag
        AdcdRegs.ADCINTSEL1N2.bit.INT1SEL = 5;
        AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;      // Make sure INT1 flag is
cleared

        AdcdRegs.ADCBURSTCTL.bit.BURSTEN = 1;
        AdcdRegs.ADCBURSTCTL.bit.BURSTSIZE= 5;
        AdcdRegs.ADCBURSTCTL.bit.BURSTTRIGSEL = 5; //EPWM1


        AdcdRegs.ADCSOCPRICTL.bit.SOCPRIORITY = 0;


     EDIS;

}

void adcAisr(void)
{

        a=a+1;
        if(a>5)
        {a=0;}


        a0 = AdcaResultRegs.ADCRESULT0;
        a1 = AdcaResultRegs.ADCRESULT1;
        a2 = AdcaResultRegs.ADCRESULT2;
        a3 = AdcaResultRegs.ADCRESULT3;
        a4 = AdcaResultRegs.ADCRESULT4;
        a5 = AdcaResultRegs.ADCRESULT5;



        AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;      // Clear ADC INT1 flag
        EPwm1Regs.ETCLR.bit.INT = 1;
        EPwm1Regs.ETCLR.bit.SOCA = 1;
        PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;     // Acknowledge PIE group 1
to enable further interrupts
}

void adcBisr(void)
{

        b=b+1;
        if(b>5)
        {b=0;}

        b0 = AdcbResultRegs.ADCRESULT0;
        b1 = AdcbResultRegs.ADCRESULT1;
        b2 = AdcbResultRegs.ADCRESULT2;
        b3 = AdcbResultRegs.ADCRESULT3;
        b4 = AdcbResultRegs.ADCRESULT4;
        b5 = AdcbResultRegs.ADCRESULT5;

        AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;      // Clear ADC INT1 flag
        EPwm1Regs.ETCLR.bit.INT = 1;
        EPwm1Regs.ETCLR.bit.SOCA = 1;
        PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;     // Acknowledge PIE group 1
to enable further interrupts
}

void adcCisr(void)
{

        c=c+1;
        if(c>5)
        {c=0;}


        c2 = AdcbResultRegs.ADCRESULT2;
        c3 = AdcbResultRegs.ADCRESULT3;
        c4 = AdcbResultRegs.ADCRESULT4;
        c5 = AdcbResultRegs.ADCRESULT5;

        AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;      // Clear ADC INT1 flag
        EPwm1Regs.ETCLR.bit.SOCA = 1;
        EPwm1Regs.ETCLR.bit.INT = 1;
        PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;     // Acknowledge PIE group 1
to enable further interrupts
}

void adcDisr(void)
{


        d=d+1;
        if(d>5)
        {d=0;}


        d0 = AdcdResultRegs.ADCRESULT0;
        d1 = AdcdResultRegs.ADCRESULT1;
        d2 = AdcdResultRegs.ADCRESULT2;
        d3 = AdcdResultRegs.ADCRESULT3;
        d4 = AdcdResultRegs.ADCRESULT4;
        d5 = AdcdResultRegs.ADCRESULT5;

        AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;      // Clear ADC INT1 flag
        EPwm1Regs.ETCLR.bit.INT = 1;
        EPwm1Regs.ETCLR.bit.SOCA = 1;
        PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;     // Acknowledge PIE group 1
to enable further interrupts

}

0 Benjamin Collier over 2 years ago in reply to rajesh beesetty

TI__Mastermind 36526 points

Hi,

I do not notice anything obvious in your program that would cause the ISRs to not be triggered.

I have provided an example program below in which there are bursts on ADCA, ADCB, ADCC, and ADCD (all triggered by EPWM1). There is a different ISR triggered at the end of each burst, and you can watch the values of the adcXResult2 variables increment in your watch expressions so that you can see that each ISR is triggered.

This example is a combination of adc_ex11_multiple_soc_epwm and adc_ex12_burst_mode_epwm, which you can find in the C2000WARE adc examples for F2837xD. This uses driverlib instead of bitfield, which I think makes the code easier to read, and provides a helpful layer of abstraction.

#include "driverlib.h"
#include "device.h"

//
// Defines
//
#define EX_ADC_RESOLUTION       12
// 12 for 12-bit conversion resolution, which supports (ADC_MODE_SINGLE_ENDED)
// Sample on single pin (VREFLO is the low reference)
// Or 16 for 16-bit conversion resolution, which supports (ADC_MODE_DIFFERENTIAL)
// Sample on pair of pins (difference between pins is converted, subject to
// common mode voltage requirements; see the device data manual)

//
// Globals
//
uint16_t adcAResult0; 
uint16_t adcAResult1;
uint16_t adcAResult2;
uint16_t adcDResult0;
uint16_t adcDResult1;
uint16_t adcDResult2;
uint16_t adcBResult0;
uint16_t adcBResult1;
uint16_t adcBResult2;
uint16_t adcCResult0;
uint16_t adcCResult1;
uint16_t adcCResult2;

//
// Function Prototypes
//
void configureADC(uint32_t adcBase);
void initEPWM();
void initADCSOC(void);
__interrupt void adcA1ISR(void);
__interrupt void adcD1ISR(void);
__interrupt void adcB1ISR(void);
__interrupt void adcC1ISR(void);

//
// Main
//
void main(void)
{
    //
    // Initialize device clock and peripherals
    //
    Device_init();

    //
    // Disable pin locks and enable internal pullups.
    //
    Device_initGPIO();

    //
    // Initialize PIE and clear PIE registers. Disables CPU interrupts.
    //
    Interrupt_initModule();

    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    //
    Interrupt_initVectorTable();

    //
    // Interrupts that are used in this example are re-mapped to ISR functions
    // found within this file.
    //
    Interrupt_register(INT_ADCA1, &adcA1ISR);
    Interrupt_register(INT_ADCD1, &adcD1ISR);
    Interrupt_register(INT_ADCB1, &adcB1ISR);
    Interrupt_register(INT_ADCC1, &adcC1ISR);

    //
    // Set up the ADC and the ePWM and initialize the SOC
    //
    configureADC(ADCA_BASE);
    configureADC(ADCD_BASE);
    configureADC(ADCB_BASE);
    configureADC(ADCC_BASE);
    initEPWM();
    initADCSOC();

    //
    // Enable ADC interrupt
    //
    Interrupt_enable(INT_ADCA1);
    Interrupt_enable(INT_ADCD1);
    Interrupt_enable(INT_ADCB1);
    Interrupt_enable(INT_ADCC1);

    //
    // Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
    //
    EINT;
    ERTM;

    //
    // Start ePWM1, enabling SOCA and putting the counter in up-count mode
    //
    EPWM_enableADCTrigger(EPWM1_BASE, EPWM_SOC_A);
    EPWM_setTimeBaseCounterMode(EPWM1_BASE, EPWM_COUNTER_MODE_UP);

    //
    // Take conversions indefinitely in loop
    //
    do
    {
        //
        // Wait while ePWM causes ADC conversions.
        // ADCA1 ISR processes each new set of conversions. 
        //
    }
    while(1);
}

//
// configureADC - Write ADC configurations and power up the ADC for the
// selected ADC
//
void configureADC(uint32_t adcBase)
{
    //
    // Set ADCDLK divider to /4
    //
    ADC_setPrescaler(adcBase, ADC_CLK_DIV_4_0);

    //
    // Set resolution and signal mode (see #defines above) and load
    // corresponding trims.
    //
#if(EX_ADC_RESOLUTION == 12)
    ADC_setMode(adcBase, ADC_RESOLUTION_12BIT, ADC_MODE_SINGLE_ENDED);
#elif(EX_ADC_RESOLUTION == 16)
    ADC_setMode(adcBase, ADC_RESOLUTION_16BIT, ADC_MODE_DIFFERENTIAL);
#endif

    //
    // Set pulse positions to late
    //
    ADC_setInterruptPulseMode(adcBase, ADC_PULSE_END_OF_CONV);

    //
    // Power up the ADCs and then delay for 1 ms
    //
    ADC_enableConverter(adcBase);

    //
    // Delay for 1ms to allow ADC time to power up
    //
    DEVICE_DELAY_US(1000);
}

//
// Function to configure ePWM1 to generate the SOC.
//
void initEPWM(void)
{
    //
    // Disable SOCA
    //
    EPWM_disableADCTrigger(EPWM1_BASE, EPWM_SOC_A);

    //
    // Configure the SOC to occur on the first up-count event
    //
    EPWM_setADCTriggerSource(EPWM1_BASE, EPWM_SOC_A, EPWM_SOC_TBCTR_U_CMPA);
    EPWM_setADCTriggerEventPrescale(EPWM1_BASE, EPWM_SOC_A, 1);

    //
    // Set the compare A value to 1000 and the period to 1999
    // Assuming ePWM clock is 100MHz, this would give 50kHz sampling
    // 50MHz ePWM clock would give 25kHz sampling, etc. 
    // The sample rate can also be modulated by changing the ePWM period
    // directly (ensure that the compare A value is less than the period). 
    //
    EPWM_setCounterCompareValue(EPWM1_BASE, EPWM_COUNTER_COMPARE_A, 1000);
    EPWM_setTimeBasePeriod(EPWM1_BASE, 1999);

    //
    // Set the local ePWM module clock divider to /1
    //
    EPWM_setClockPrescaler(EPWM1_BASE,
                           EPWM_CLOCK_DIVIDER_1,
                           EPWM_HSCLOCK_DIVIDER_1);

    //
    // Freeze the counter
    //
    EPWM_setTimeBaseCounterMode(EPWM1_BASE, EPWM_COUNTER_MODE_STOP_FREEZE);
}

//
// Function to configure SOCs on ADCA and ADCD to be triggered by ePWM1.
//
void initADCSOC(void)
{
        uint16_t acqps;

    //
    // Determine minimum acquisition window (in SYSCLKS) based on resolution
    //
    if(EX_ADC_RESOLUTION == 12)
    {
        acqps = 14; // 75ns
    }
    else //resolution is 16-bit
    {
        acqps = 63; // 320ns
    }
    //
    // - NOTE: A longer sampling window will be required if the ADC driving
    //   source is less than ideal (an ideal source would be a high bandwidth
    //   op-amp with a small series resistance). See TI application report
    //   SPRACT6 for guidance on ADC driver design.
    // - NOTE: SOCs need not use the same S+H window duration, but SOCs 
    //   occurring in parallel (in this example, SOC0 on both ADCs occur in 
    //   parallel, as do the SOC1s on both ADCs, etc.) should usually
    //   use the same value to ensure simultaneous samples and synchronous 
    //   operation.  

    //
    // Select the channels to convert and the configure the ePWM trigger 
    //
    ADC_setupSOC(ADCA_BASE, ADC_SOC_NUMBER0, ADC_TRIGGER_SW_ONLY,
                 ADC_CH_ADCIN0, acqps);
    ADC_setupSOC(ADCA_BASE, ADC_SOC_NUMBER1, ADC_TRIGGER_SW_ONLY,
                 ADC_CH_ADCIN1, acqps);
    ADC_setupSOC(ADCA_BASE, ADC_SOC_NUMBER2, ADC_TRIGGER_SW_ONLY,
                 ADC_CH_ADCIN2, acqps);

    ADC_setupSOC(ADCD_BASE, ADC_SOC_NUMBER0, ADC_TRIGGER_SW_ONLY,
                 ADC_CH_ADCIN2, acqps);
    ADC_setupSOC(ADCD_BASE, ADC_SOC_NUMBER1, ADC_TRIGGER_SW_ONLY,
                 ADC_CH_ADCIN3, acqps);
    ADC_setupSOC(ADCD_BASE, ADC_SOC_NUMBER2, ADC_TRIGGER_SW_ONLY,
                 ADC_CH_ADCIN4, acqps);

    ADC_setupSOC(ADCB_BASE, ADC_SOC_NUMBER0, ADC_TRIGGER_SW_ONLY,
                 ADC_CH_ADCIN0, acqps);
    ADC_setupSOC(ADCB_BASE, ADC_SOC_NUMBER1, ADC_TRIGGER_SW_ONLY,
                 ADC_CH_ADCIN1, acqps);
    ADC_setupSOC(ADCB_BASE, ADC_SOC_NUMBER2, ADC_TRIGGER_SW_ONLY,
                 ADC_CH_ADCIN2, acqps);

    ADC_setupSOC(ADCC_BASE, ADC_SOC_NUMBER0, ADC_TRIGGER_SW_ONLY,
                 ADC_CH_ADCIN2, acqps);
    ADC_setupSOC(ADCC_BASE, ADC_SOC_NUMBER1, ADC_TRIGGER_SW_ONLY,
                 ADC_CH_ADCIN3, acqps);
    ADC_setupSOC(ADCC_BASE, ADC_SOC_NUMBER2, ADC_TRIGGER_SW_ONLY,
                 ADC_CH_ADCIN4, acqps);

    ADC_enableBurstMode(ADCA_BASE);
    ADC_setBurstModeConfig(ADCA_BASE, ADC_TRIGGER_EPWM1_SOCA, 3);

    ADC_enableBurstMode(ADCD_BASE);
    ADC_setBurstModeConfig(ADCD_BASE, ADC_TRIGGER_EPWM1_SOCA, 3);

    ADC_enableBurstMode(ADCB_BASE);
    ADC_setBurstModeConfig(ADCB_BASE, ADC_TRIGGER_EPWM1_SOCA, 3);

    ADC_enableBurstMode(ADCC_BASE);
    ADC_setBurstModeConfig(ADCC_BASE, ADC_TRIGGER_EPWM1_SOCA, 3);

    //
    // Select SOC2 on ADCA as the interrupt source.  SOC2 on ADCD will end at
    // the same time, so either SOC2 would be an acceptable interrupt triggger.
    //
    ADC_setInterruptSource(ADCA_BASE, ADC_INT_NUMBER1, ADC_SOC_NUMBER2);
    ADC_enableInterrupt(ADCA_BASE, ADC_INT_NUMBER1);
    ADC_clearInterruptStatus(ADCA_BASE, ADC_INT_NUMBER1);

    ADC_setInterruptSource(ADCD_BASE, ADC_INT_NUMBER1, ADC_SOC_NUMBER2);
    ADC_enableInterrupt(ADCD_BASE, ADC_INT_NUMBER1);
    ADC_clearInterruptStatus(ADCD_BASE, ADC_INT_NUMBER1);

    ADC_setInterruptSource(ADCB_BASE, ADC_INT_NUMBER1, ADC_SOC_NUMBER2);
    ADC_enableInterrupt(ADCB_BASE, ADC_INT_NUMBER1);
    ADC_clearInterruptStatus(ADCB_BASE, ADC_INT_NUMBER1);

    ADC_setInterruptSource(ADCC_BASE, ADC_INT_NUMBER1, ADC_SOC_NUMBER2);
    ADC_enableInterrupt(ADCC_BASE, ADC_INT_NUMBER1);
    ADC_clearInterruptStatus(ADCC_BASE, ADC_INT_NUMBER1);
}

//
// ADC A Interrupt 1 ISR
//
__interrupt void adcA1ISR(void)
{
    //
    // Store results
    //
    adcAResult0 = ADC_readResult(ADCARESULT_BASE, ADC_SOC_NUMBER0);
    adcAResult1 = ADC_readResult(ADCARESULT_BASE, ADC_SOC_NUMBER1);
    adcAResult2 += 1;

    //
    // Clear the interrupt flag
    //
    ADC_clearInterruptStatus(ADCA_BASE, ADC_INT_NUMBER1);

    //
    // Check if overflow has occurred
    //
    if(true == ADC_getInterruptOverflowStatus(ADCA_BASE, ADC_INT_NUMBER1))
    {
        ADC_clearInterruptOverflowStatus(ADCA_BASE, ADC_INT_NUMBER1);
        ADC_clearInterruptStatus(ADCA_BASE, ADC_INT_NUMBER1);
    }

    //
    // Acknowledge the interrupt
    //
    Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP1);
}

//
// ADC D Interrupt 1 ISR
//
__interrupt void adcD1ISR(void)
{
    //
    // Store results
    //
    adcDResult0 = ADC_readResult(ADCDRESULT_BASE, ADC_SOC_NUMBER0);
    adcDResult1 = ADC_readResult(ADCDRESULT_BASE, ADC_SOC_NUMBER1);
    adcDResult2 += 1;

    //
    // Clear the interrupt flag
    //
    ADC_clearInterruptStatus(ADCD_BASE, ADC_INT_NUMBER1);

    //
    // Check if overflow has occurred
    //
    if(true == ADC_getInterruptOverflowStatus(ADCD_BASE, ADC_INT_NUMBER1))
    {
        ADC_clearInterruptOverflowStatus(ADCD_BASE, ADC_INT_NUMBER1);
        ADC_clearInterruptStatus(ADCD_BASE, ADC_INT_NUMBER1);
    }

    //
    // Acknowledge the interrupt
    //
    Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP1);
}

//
// ADC B Interrupt 1 ISR
//
__interrupt void adcB1ISR(void)
{
    //
    // Store results
    //
    adcBResult0 = ADC_readResult(ADCBRESULT_BASE, ADC_SOC_NUMBER0);
    adcBResult1 = ADC_readResult(ADCBRESULT_BASE, ADC_SOC_NUMBER1);
    adcBResult2 += 1;

    //
    // Clear the interrupt flag
    //
    ADC_clearInterruptStatus(ADCB_BASE, ADC_INT_NUMBER1);

    //
    // Check if overflow has occurred
    //
    if(true == ADC_getInterruptOverflowStatus(ADCB_BASE, ADC_INT_NUMBER1))
    {
        ADC_clearInterruptOverflowStatus(ADCB_BASE, ADC_INT_NUMBER1);
        ADC_clearInterruptStatus(ADCB_BASE, ADC_INT_NUMBER1);
    }

    //
    // Acknowledge the interrupt
    //
    Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP1);
}

//
// ADC C Interrupt 1 ISR
//
__interrupt void adcC1ISR(void)
{
    //
    // Store results
    //
    adcCResult0 = ADC_readResult(ADCCRESULT_BASE, ADC_SOC_NUMBER0);
    adcCResult1 = ADC_readResult(ADCCRESULT_BASE, ADC_SOC_NUMBER1);
    adcCResult2 += 1;

    //
    // Clear the interrupt flag
    //
    ADC_clearInterruptStatus(ADCC_BASE, ADC_INT_NUMBER1);

    //
    // Check if overflow has occurred
    //
    if(true == ADC_getInterruptOverflowStatus(ADCC_BASE, ADC_INT_NUMBER1))
    {
        ADC_clearInterruptOverflowStatus(ADCC_BASE, ADC_INT_NUMBER1);
        ADC_clearInterruptStatus(ADCC_BASE, ADC_INT_NUMBER1);
    }

    //
    // Acknowledge the interrupt
    //
    Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP1);
}

Please let me know if you are able to fix your problem by using this as a reference.

Best Regards,

Ben Collier

C2000™︎ microcontrollers

C2000 microcontrollers forum

TMS320F28379D: multi ADC initialization interrupt