TMS320F28379D: Using SysConfig setting DMA to get data form ADC

Hi Nima,

Thank you for your reply. I understand. I will use the direct address for the ADC results register.

Do you have an idea if the DMA will be completely implemented in the SysConfig tool?

Regards,
Leon

Nima,

I have a follow-up question regarding setting up DMA with the SysConfig tool. I attempted to use the Manual mode for the start address and placed the address of the ADCC RESULT register (0xB40). The generated code "DMA_configAddresses(dmaADC500K_BASE, adcDataBuffer, 2880);" uses a number instead of a pointer and conflicts with the DMA_configAddress function definition (in dma.h).

The second problem I encountered using the Variable/Function mode for the destination address. I declared the "adcDataBuffer" variable in my main file "uint16_t adcDataBuffer[4096];". I placed the name of the array in the SysConfig file:

This is the generated code:

I received the following error during the project build:

Can you please help me to resolve these issues?

Thank you.

Regards,
Leon

The number is not what's causing the build error. I just did this and it was able to go through.

Hello Nima,

First I want to thank you for your continuous support. I appreciate your time and help.

During the weekend I imported an example project dma_ex1_gsram_transfer and saw the solution that you recommended. However, over the weekend when I implemented the DMA driver with SysConfig, I kept getting the error #10099-D "program will not fit into available memory". I implemented the driver myself (without the SysConfig tool) and did not receive the memory error. I compared the Memory Allocation between the two implementations:

SysConfig Implementation

Non-SysConfig Implementation

My 2837xD_RAM_lnk_cpu1.cmd file:

MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */

   BEGIN            : origin = 0x000000, length = 0x000002
   RAMM0            : origin = 0x000123, length = 0x0002DD
   RAMD0            : origin = 0x00B000, length = 0x000800
   RAMLS0           : origin = 0x008000, length = 0x000800
   RAMLS1           : origin = 0x008800, length = 0x000800
   RAMLS2           : origin = 0x009000, length = 0x000800
   RAMLS3           : origin = 0x009800, length = 0x000800
   RAMLS4           : origin = 0x00A000, length = 0x000800
   RESET            : origin = 0x3FFFC0, length = 0x000002

  /* Flash sectors */
   FLASHA           : origin = 0x080002, length = 0x001FFE	/* on-chip Flash */
   FLASHB           : origin = 0x082000, length = 0x002000	/* on-chip Flash */
   FLASHC           : origin = 0x084000, length = 0x002000	/* on-chip Flash */
   FLASHD           : origin = 0x086000, length = 0x002000	/* on-chip Flash */
   FLASHE           : origin = 0x088000, length = 0x008000	/* on-chip Flash */
   FLASHF           : origin = 0x090000, length = 0x008000	/* on-chip Flash */
   FLASHG           : origin = 0x098000, length = 0x008000	/* on-chip Flash */
   FLASHH           : origin = 0x0A0000, length = 0x008000	/* on-chip Flash */
   FLASHI           : origin = 0x0A8000, length = 0x008000	/* on-chip Flash */
   FLASHJ           : origin = 0x0B0000, length = 0x008000	/* on-chip Flash */
   FLASHK           : origin = 0x0B8000, length = 0x002000	/* on-chip Flash */
   FLASHL           : origin = 0x0BA000, length = 0x002000	/* on-chip Flash */
   FLASHM           : origin = 0x0BC000, length = 0x002000	/* on-chip Flash */
   FLASHN           : origin = 0x0BE000, length = 0x001FF0	/* on-chip Flash */

//   FLASHN_RSVD     : origin = 0x0BFFF0, length = 0x000010    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

PAGE 1 :

   BOOT_RSVD       : origin = 0x000002, length = 0x000121     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x0003F8     /* on-chip RAM block M1 */
//   RAMM1_RSVD      : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
   RAMD1           : origin = 0x00B800, length = 0x000800

   RAMLS5      : origin = 0x00A800, length = 0x000800

   RAMGS0      : origin = 0x00C000, length = 0x001000
   RAMGS1      : origin = 0x00D000, length = 0x001000
   RAMGS2      : origin = 0x00E000, length = 0x001000
   RAMGS3      : origin = 0x00F000, length = 0x001000
   RAMGS4      : origin = 0x010000, length = 0x001000
   RAMGS5      : origin = 0x011000, length = 0x001000
   RAMGS6      : origin = 0x012000, length = 0x001000
   RAMGS7      : origin = 0x013000, length = 0x001000
   RAMGS8      : origin = 0x014000, length = 0x001000
   RAMGS9      : origin = 0x015000, length = 0x001000
   RAMGS10     : origin = 0x016000, length = 0x001000

//   RAMGS11     : origin = 0x017000, length = 0x000FF8   /* Uncomment for F28374D, F28376D devices */

//   RAMGS11_RSVD : origin = 0x017FF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   RAMGS11     : origin = 0x017000, length = 0x002000
   RAMGS13     : origin = 0x019000, length = 0x002000
   RAMGS15     : origin = 0x01B000, length = 0x000FF8     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
   
//   RAMGS15_RSVD : origin = 0x01BFF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
                                                            /* Only on F28379D, F28377D, F28375D devices. Remove line on other devices. */

   CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
   CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400

   CANA_MSG_RAM     : origin = 0x049000, length = 0x000800
   CANB_MSG_RAM     : origin = 0x04B000, length = 0x000800
}


SECTIONS
{
   codestart        : > BEGIN,     PAGE = 0
   .text            : >> RAMD0 |  RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4,   PAGE = 0
   .cinit           : > RAMM0,     PAGE = 0
   .switch          : > RAMM0,     PAGE = 0
   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */
   .stack           : > RAMM1,     PAGE = 1

#if defined(__TI_EABI__)
   .bss				: >> RAMLS5 | RAMGS13 | RAMGS11,		PAGE = 1
   .bss:output      : > RAMLS3,    PAGE = 0
   .init_array      : > RAMM0,     PAGE = 0
   .const           : > RAMLS5,    PAGE = 1
   .data            : > RAMLS5,    PAGE = 1
   .sysmem          : > RAMLS5,    PAGE = 1
#else
   .pinit           : > RAMM0,     PAGE = 0
   .ebss            : > RAMLS5,    PAGE = 1
   .econst          : > RAMLS5,    PAGE = 1
   .esysmem         : > RAMLS5,    PAGE = 1
#endif

   Filter_RegsFile  : > RAMGS0,    PAGE = 1


   ramgs0           : > RAMGS0,    PAGE = 1
   ramgs1           : > RAMGS1,    PAGE = 1

#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} > RAMM0,      PAGE = 0
   #else
    ramfuncs    : > RAMM0      PAGE = 0   
   #endif
#endif

   /* The following section definitions are required when using the IPC API Drivers */
    GROUP : > CPU1TOCPU2RAM, PAGE = 1
    {
        PUTBUFFER
        PUTWRITEIDX
        GETREADIDX
    }

    GROUP : > CPU2TOCPU1RAM, PAGE = 1
    {
        GETBUFFER :    TYPE = DSECT
        GETWRITEIDX :  TYPE = DSECT
        PUTREADIDX :   TYPE = DSECT
    }

    /* The following section definition are for SDFM examples */
   Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
   Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
   Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
   Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
   Difference_RegsFile : >RAMGS5,   PAGE = 1, fill=0x3333
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

Do you see any reason for such an error to occur?

Thank you.

Regards,
Leon

Veena Kamath do you know what causes this failed memory allocation?

Leon,

Where is it trying to place the ADC buffer when it fails? There should be an error in the console!

Nima,

I am not sure if I understand the question correctly. The adcDataBuffer array is placed in the RAMGS13 location

This is how the variables are defined

uint16_t adcDataBuffer[2*ADC_BUFFER_SIZE];
const void * adcDataBufferPtr = (const void *)adcDataBuffer;

This is the generated code in the board.c file:

void dmaADC500K_init(){
    DMA_setEmulationMode(DMA_EMULATION_FREE_RUN);
    DMA_configAddresses(dmaADC500K_BASE, adcDataBufferPtr, 2880);
    DMA_configBurst(dmaADC500K_BASE, 1U, 0, 0);
    DMA_configTransfer(dmaADC500K_BASE, 4096U, 0, 1);
    DMA_configWrap(dmaADC500K_BASE, 65535U, 0, 65535U, 0);
    DMA_configMode(dmaADC500K_BASE, DMA_TRIGGER_EPWM3SOCA, DMA_CFG_ONESHOT_DISABLE | DMA_CFG_CONTINUOUS_ENABLE | DMA_CFG_SIZE_16BIT);
    DMA_setInterruptMode(dmaADC500K_BASE, DMA_INT_AT_END);
    DMA_enableInterrupt(dmaADC500K_BASE);
    DMA_disableOverrunInterrupt(dmaADC500K_BASE);
    DMA_enableTrigger(dmaADC500K_BASE);
    DMA_stopChannel(dmaADC500K_BASE);
}

Please let me know if I was able to answer your question.

Regards,
Leon

What about in the failing scenario? where is it trying to place it?

it places it in the same location for both scenarios. 

The error is regarding the ".text" section:

It looks like in the first passing scenario it puts the ADC buffer in the RAMGS but in the second it tries to place it in RAMLS which it wont fit in.

That makes sense. Depending how much you add for initialization in Board.c, the size of the file gets larger and larger. Glad you identified the error.