TMS320F28376D: AUXPLLCLK

Kurumi Hasegawa

Part Number: TMS320F28376D

Hi team,

The TRM states that the USB module requires a fixed 60 MHz clock for bit sampling. However, the datasheet states that the range for f(auxpll) is 2-60MHz.

Does that mean we should set AUXPLLCLK＝60MHz exactly to use USB module? Can we use 58-60MHz, which was achieved by divide/multiple XTAL?

Best regards,

Kurumi

over 2 years ago

0 Siddharth Deshpande over 2 years ago

TI__Mastermind 36425 points

Kurumi,

USB requires a fixed clock of 60 MHz. AUXPLLCLK should be 60MHz

Best Regards

Siddharth

0 Kurumi Hasegawa over 2 years ago in reply to Siddharth Deshpande

TI__Expert 7991 points

Hi Siddharth,

Would it be possible to share the reason behind why AUXPLLCLK should be fixed 60MHz? Is it because of the USB standard restriction?

Best regards,

Kurumi

0 Kurumi Hasegawa over 2 years ago in reply to Kurumi Hasegawa

TI__Expert 7991 points

Hi Siddharth,

This is just a friendly reminder. I'd appreciate it if you could give us update.

Best regards,

Kurumi

0 Siddharth Deshpande over 2 years ago in reply to Kurumi Hasegawa

TI__Mastermind 36425 points

Kurumi,

USB clock tolerances are very tight. Because of this USB requires a low jitter clock at a defined/fixed speed (60MHz) for bit sampling.

Best Regards

Siddharth

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TMS320F28376D: AUXPLLCLK