Part Number: TMS320F280039C-Q1
Other Parts Discussed in Thread: C2000WARE
Hello support,
in the case of transmission handled though dedicated tx Buffers, I need to manage this situation:
into the Tx interrupt ISR, I want to know which Tx Buffer has triggered the interrupt (i.e. which is the frame just sent).
My first idea was to use TXBTO, clearing it before leaving the Tx int ISR and reading it when entering Tx int ISR, but this register is not clearable by user sw.
If I read the register TXBTO under ISR, I find all bits to 1 because those bits are reset only by a new tx request (via TXBAR). Do you confirm ?
The only way I found is to create in sw a maks of bits, each one representing in real time the voluntee of sw to send a frame (sort of copy of TXBAR) and compare it
to TXBTO inside Tx INT ISR.
Do you have any suggestions about other MCAN registers that can be used to manage this use case ?