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TMS320F28377D: EMIF1 bus toggle issue

Part Number: TMS320F28377D

Hi team,

1) Using TMS320F28377D, EMIF1 bus with SDRAM, FPGA, and dual port RAM mounted, CPU1 requires access to SDRAM and FPGA, and CPU2 requires access to dual-port RAM. Can the EMIF1 bus switch back and forth between CPU1 and CPU2?

2) If so, is there any delay in this switching bus? Will access to external devices be affected?

Thanks.

Best,

Cherry

  • Hi,

    2) If so, is there any delay in this switching bus? Will access to external devices be affected?

    Thanks.

    Yes, that should be possible but user need to make sure there is no transaction in CPU/Bridge pipeline before switching the ownership. Instead of switching, why not use one EMIF with CPU1 and other one with CPU2. This is why we have two EMIF on this device.

    Regards,

    Vivek Singh