Part Number: LAUNCHXL-F280025C
Other Parts Discussed in Thread: SYSCONFIG, C2000WARE
I was trying to configure the EPWMs and CMPSS modules for following the peak current control for buck converter.
My configuration can be summarized as -
- Configuration of CMPSS module with asynchronous output setting i.e. CTRIPH
- Configuration of EPWMXBAR such that this CTRIPH is taken onto EPWM as Trip4 signal.
- This Trip4 signal triggers the DCAH signal which in turn triggers the DCAEVT2 event
- This DCAEVT2 event is used as T1 trigger in AQ module of the EPWM and used to RESET the PWMA (after being SET at Counter = ZERO).
- The PWM is configured for Up-counter and the AQ is SET at counter = ZERO and RESET at T1 = DCAEVT2 event.
- No setting in the Tripzone module is changed.
All settings are there in the attached sysconfig file. The project itself is taken from the example project from c2000ware and the sysconfig file is configured accordingly as highlighted above. The CMPSS +ve input is fed from an external signal generator (with skewed ramp signal) and DAC threshold on the -ve input of CMPSS is set to 2048 ( = 1.65V).
The output is shown in the attached images. Now the thing is, I expected the PWM falling edge to happen as soon as the Signal on the +ve pin touches the DAC threshold but that is actually happening at falling edge as can be seen in the images. I have changed the skew of the waveform to verify that the PWM edge falls only when the input goes below the 1.65V threshold.
Please advise on this. Why is this happening.
