Steady state PWM of 2 motor phases and current measurments

Hi Tom,

there could be any number of reasons, but most likely it all of them:

1. you probably have some dead-time, which decreases effective duty cycle, which should introduce constant relative error

2. You are assuming the substitute resistance (two MOSFETS and machine resistance) is 0.140 ohms. While this is true in steady state (no switching) the dynamic Rds-on is usually somewhat higher than what is stated in device datasheet.

3. Even if you apply e.g. 12% duty cycle part of it is "wasted" for the switching action (switch on and switch off)

4. With higher current you have bigger losses, which heat up the MOSFET, which in turn increases MOSFET resistance

5. There is always a chance that your current measurement is not working properly

Cheers, Mitja

Thanks for the reply, additional info to your points:

1) I do take dead time into account with my estimations.  The scenario I'm describing assumes this is factored into the duty cycle number.

2) The FET RDS on is very very low, .001 mOhm worst case.  Even if this doubles due to switching, impact should be minimal.

3) Can this loss be predicted?  Would this really cause this much waste?

4) I do have to check, I do run steady stated on my bench.  Ideally, this will only run for 10ms.

5) As a note, the 3phase pmsm does run in closed loop.  I'm am just trying to run a steady state test. 

Thanks for the reply, and any more info that will help me get a predicted valued!

Tom

Hi Tom

1) Do you just subtract dead time from duty cycle or do you employ more complex model? (it really depends on the current flow, but during dead time the voltage on the machine is basically opposite of the current vector).

2) I assume it is 0.001 Ohms or 1 mOhm. If you do have 0.001 mOhm FETS, please let me know the brand/model.

3) Probably you can get a little bit closer, but I have no experience in this.

4) Forgot to mention, but the stator winding resistance also rises with temperature

5) It would help if you would describe current measurement in detail. Especially how it is related to PWM (are you using symmetric or asymmetric PWM, when do you have ADC SOC trigger, switching frequency, current probe used, any filters in the signal chain). If you can also let us know what is the inductance that would be great.

Cheers, Mitja

Hi Mitja,

1) Simple subtraction of rising and falling deadband times, nothing complex.

2) The FETs are AUIRF7739L2TR, a fairly new one.

4) I'm running at room temp now, and have not seen much deviation due to heating, though this is something I need to consider.

5) I'll try to explain additional info, some of this is in my first powt.:

The PWM is 20KHz, and running as center aligned up/down count, complimentary.  One phase out of the 3 (call it phase A) is pwm'd, and at 10% duty cycles.   The high /low side of phase A are turning on and off in complimentary mode.   I then turn on Phase B LOW SIDE fet.   Phase C is completely off.  This is effectively 2 inductors in series.  The ADC is triggered off of PWM, and begins sampling at zero period load.   I also have a current probe on phase A to verify the Shunt reading.  Current probe and current shunt agree.  When PWM starts, there is about 2 ms of rise time, then the current reaches steady state.  This is when current is monitored.   I repeat this same procedure at 20%, 30% and other duty cycles and see if the actual values match my predicted.  Only the 10% is close, all the others are off by a wide margin.

I'm still wondering if this is related to reactance?  Any thoughts?

Tom

Hi Tom

In your place I'd hook up a scope and check current signal along with PWM signals and if you can use any spare ePWM chanels, generate a signal that is synchornized to main PWM and changes state at zero. And if you have a differential voltage probe available, check the voltage accross machine terminals (A-B). If you can obtain average applied voltage you will at least be able to see if the problem is in the power electronics, or did you get the machine resistance wrong. If the problem is in the power electronics, you should check the applied duty cycle versus the one the MCU thinks it is outputting.

Here is where inductance and proper sampling comes in (maybe).

Basically you have an inductor and resistor any a step down converter. During the on phase the current is increasing, while during the off phase current is freewheeling and decreasing. I think we can assume you have largest current ripple when duty cycle is 50%

You are assuming that you are sampling at the middle of the on interval. In fact due to all delays in MOSFET driving signal path you are actually sampling before the middle of the on interval. If the inductance is small, than current change within the on interval is big (big current slope) and the difference between the sampling point and actual middle of on interval can be significant. And this effect will be most pronounced when you have large current ripple I am not saying that this is the case with your setup, but I have had this kind of problems before and I had to delay the sampling in order to compensate for the delay caused by gate drivers.

Cheers, Mitja

Thanks Mitja, you are on to something with the higher duty cycles and the sampling point.  I'll see if I can confirm, but it sounds very plausible.  I'll let you know !! THanks.

Tom

Hi Mitja,

Just did some measurements and unfortunately, this is not my problem.  I turned on the SOCA bit that toggles at start of conversion,  and sample is correct.  Also, when I measure the current shunt with the scope, the min and max of the LR charging is still below my predicted.

Maybe my calculation for prediction is wrong.  Do you have a method for calculating this?  I'm using:

V/R * duty cycle%, where R is the inductor resistance, shunt resistance, and FET resistance.

Thanks.

Tom

 Hi Tom

If you measure correctly then you can either have a mistake in modeling actual duty cycle (see my remarks how to confirm it) or in modeling resistance. I don't know much abot your machine, but you might observe increased resistance due to skin effect. Also if you have large current ripple, hysteresis and eddy current loses in the iron of the machine will present themselves as additional resistance.

Cheers, Mitja

Hi Chris,

Readings are lower.  I did keep the voltage constant during this time, so as duty went up, I adjusted VBat to the same value.

Any suggestions on trying to predict expected currents based on PWM Duty at fixed frequency?

Thanks.

Tom

you would have to characterize the change in resistance expected for your motor, and have a good feel for average voltage actually applied at a given duty cycle (adding in effects of dead-time, switch off/on time, etc). 

with your motor that has such a small resistance, a small change is going to have a large affect on the overall current draw.