Other Parts Discussed in Thread: C2000WARE



Hi TI,
I am getting the following error while running file in CCS.
Please suggest any probable way to resolve this issue.
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Hi TI,
I am getting the following error while running file in CCS.
Please suggest any probable way to resolve this issue.
#include "F28x_Project.h"//divide header files
#include "math.h"//divide header files
//external function prototypes
extern void InitSysCtrl(void);
void InitEPwm12Gpio_1(void);
void EPwm6compare(void);
void EPwm1compare(void);
void EPwm3compare(void);
void ConfigureADC(void);
void configureDAC(void);
interrupt void adca1_isr(void);
/*calling variables*/
unsigned int AdcaResults;
unsigned int abc1;
unsigned int i=1;
unsigned int Phase_shift = 0;
unsigned int Phase_shift1;
float signal[ 199 ];
void main(void)
{
InitSysCtrl();//basic core init. from F2837xD
InitEPwm12Gpio_1();// call EPwm6-2 settings
DINT; //Disable ALL interrupts
InitPieCtrl();
IER = 0x0000;//Disable CPU interrupts and clear all CPU interrupt flags:
IFR = 0x0000;//Disable CPU interrupts and clear all CPU interrupt flags:
InitPieVectTable(); // Initialize the PIE vector table with pointers to the shell Interrupt
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.ADCA1_INT = &adca1_isr; //function for ADCA interrupt 1
EDIS;
// Configure the ADC and power it up
//
ConfigureADC();
configureDAC();
EPwm6compare(); // call compare, DISABLE COUNT UP MODE, EVENT SOCA SETTINGS
EPwm1compare(); // call compare SIN PWM
EPwm3compare(); // phase varying should be done using this
IER |= 0X0001; // Enable CPU INT1 which is connected to ADCA0
PieCtrlRegs.PIEIER1.bit.INTx1 = 1; //Enable ADCA0 INT1 in the PIE: Group 1 interrupt
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
EALLOW;
ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV = 0;
// CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
do
{
//start ePWM
EPwm6Regs.ETSEL.bit.SOCAEN = 1; //enable SOCA
EPwm6Regs.TBCTL.bit.CTRMODE = 0; //unfreeze, and enter up count mode
}while(1);
}
void InitEPwm12Gpio_1() //Defining GPIO pins for SOC and outputs
{
EALLOW;
GpioCtrlRegs.GPAPUD.bit.GPIO10 = 1; // Disable pull-up on GPIO0 (EPwm6A)
GpioCtrlRegs.GPAGMUX1.bit.GPIO10 = 0;
GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 1; // Configure GPIO0 as EPwm6A
GpioCtrlRegs.GPAPUD.bit.GPIO0 = 1; // Disable pull-up on GPIO0 (EPWM1A)
GpioCtrlRegs.GPAGMUX1.bit.GPIO0 = 0;
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // Configure GPIO0 as EPWM1A
GpioCtrlRegs.GPAPUD.bit.GPIO1 = 1; // Disable pull-up on GPIO1 (EPWM1B)
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 0;
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // Configure GPIO0 as EPWM1B
GpioCtrlRegs.GPAPUD.bit.GPIO4 = 1; // Disable pull-up on GPIO2 (EPWM2A)
GpioCtrlRegs.GPAGMUX1.bit.GPIO4 = 0;
GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1; // Configure GPIO0 as EPWM2A
GpioCtrlRegs.GPAPUD.bit.GPIO5 = 1; // Disable pull-up on GPIO3 (EPWM2B)
GpioCtrlRegs.GPAGMUX1.bit.GPIO5 = 0;
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1; // Configure GPIO0 as EPWM2B
EDIS;
}
void EPwm6compare()//defining Start of conversion
{
EALLOW;
EPwm6Regs.TBCTL.bit.CLKDIV = 0; // CLOCK RATIO TOGTHER WITH SYS
EPwm6Regs.TBCTL.bit.HSPCLKDIV = 0; // Clock ratio to SYSCLKOUT
EPwm6Regs.TBPRD = 3334; // TBPRD = EPWM CLK/(2*SWITCH FRE)
EPwm6Regs.CMPA.bit.CMPA =2000;
EPwm6Regs.ETSEL.bit.SOCAEN = 0; // Disable SOC on A group
EPwm6Regs.ETSEL.bit.SOCASEL = 4; // Select SOC on up-count
EPwm6Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
EPwm6Regs.TBCTL.bit.CTRMODE = 3; // freeze counter and activate under while loop for ADC conversion
EDIS;
}
void EPwm1compare()
// EPwm1Regs.TBCTL.all = 0xE016;
{
EALLOW;
EPwm1Regs.TBCTL.bit.PHSEN = 0x0;
EPwm1Regs.TBCTL.bit.CLKDIV = 0; // CLOCK RATIO TOGTHER WITH SYS
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0; // Clock ratio to SYSCLKOUT
EPwm1Regs.TBCTL.bit.CTRMODE = 2; //UP DOWN MODE
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
// EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm1Regs.TBPRD = 3334;//TBPRD= EPWM CLK/(2*SWITCH FRE)
EPwm1Regs.CMPA.bit.CMPA =2000; //compare register
EPwm1Regs.CMPB.bit.CMPB =1334; //compare register
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.CBU = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.CBD = AQ_SET;
// EPwm1Regs.AQCTLA.all = 0x0090; //0000 1001 0000
// EPwm1Regs.DBRED.bit.DBRED = 10;//dead band
// EPwm1Regs.DBFED.bit.DBFED = 10; // dead band
// EPwm1Regs.DBCTL.all=0X000B;// 0000 0000 0000 1011
EPwm1Regs.TBPHS.bit.TBPHS = 0;
//EPwm1Regs.TBCTL.all = 0xE026;
EDIS;
}
void EPwm3compare()//Enabling EPWM2A
{
EALLOW;
EPwm3Regs.TBCTL.bit.PHSDIR = 0x0;
EPwm3Regs.TBCTL.bit.PHSEN = 0x1;
EPwm3Regs.TBCTL.bit.CLKDIV = 0; // CLOCK RATIO TOGTHER WITH SYS
EPwm3Regs.TBCTL.bit.HSPCLKDIV = 0; // Clock ratio to SYSCLKOUT
EPwm3Regs.TBCTL.bit.CTRMODE = 2; //UP DOWN MODE
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
EPwm3Regs.TBPRD = 3334;//TBPRD= EPWM CLK/(2*SWITCH FRE)
EPwm3Regs.CMPA.bit.CMPA =2000; //compare register
EPwm3Regs.CMPB.bit.CMPB =1334;
EPwm3Regs.AQCTLA.bit.CAU = AQ_SET;
EPwm3Regs.AQCTLA.bit.CAD = AQ_CLEAR;
EPwm3Regs.AQCTLB.bit.CBU = AQ_CLEAR;
EPwm3Regs.AQCTLB.bit.CBD = AQ_SET;
// EPwm2Regs.AQCTLA.all = 0x0090; //0000 1001 0000
// EPwm2Regs.DBRED.bit.DBRED = 10;//dead band
// EPwm2Regs.DBFED.bit.DBFED = 10; // ded band
EPwm3Regs.DBCTL.all=0X000B;// 0000 0000 0000 1011*/
EPwm3Regs.TBPHS.bit.TBPHS = 0;
EDIS;
}
interrupt void adca1_isr(void)
{
GPIO_WritePin(16,0);
AdcaResults = AdcaResultRegs.ADCRESULT0;//Enabling Result Register for ADC results
Phase_shift1 = 0.41*AdcaResults;
if (Phase_shift1>833)
{
Phase_shift = 832;
}
else
{
Phase_shift = Phase_shift1;
}
EPwm3Regs.TBPHS.bit.TBPHS = Phase_shift;// Here phase shift is unknown variable for phase shifting
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
PieCtrlRegs.PIEACK.all = 0x0001; //ACK GROUP 1
DacbRegs.DACVALS.all = AdcaResults;//Enabling DAC for adc Results
}
void ConfigureADC(void)
{
//
//write configurations
//
EALLOW;
AdcaRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4
AdcSetMode(ADC_ADCA, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE); //defined in adc.c file
AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;//Set pulse positions to late
AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;//power up the ADC
for (abc1=0;abc1<1000;abc1++); //delay for 1ms to allow ADC time to power up
/*Adc soc */
AdcaRegs.ADCSOC0CTL.bit.CHSEL = 2; //SOC0 will convert pin A0
AdcaRegs.ADCSOC0CTL.bit.ACQPS = 14; //sample window is 75ns
AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 15; //trigger on EPwm6 SOCA/C
AdcaRegs.ADCINTSEL1N2.bit.INT1SEL =0 ; //end of SOC0 will set ADCINT1 flag
AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1; //enable ADCINT1 flag
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 0; //make sure INT1 flag is cleared
EDIS;
}
void configureDAC()//Enabling DAC
{
EALLOW;
DacbRegs.DACCTL.bit.DACREFSEL = 1;
DacbRegs.DACCTL.bit.LOADMODE = 0; //Load on next SYSCLK
DacbRegs.DACVALS.all = 0; //DAC Value Register - Shadow
DacbRegs.DACOUTEN.bit.DACOUTEN=1; //OUTPUT Enable
DELAY_US(10);
EDIS;
}
It seems that your code is using the older direct register access system but you're including the newer DriverLib folders. I think they can coexist but probably inadvisable for a new project. See here for more info: https://software-dl.ti.com/C2000/docs/software_guide/c2000ware/drivers.html
I think that you need to include the following folder instead of the DriverLib folder.
E:\ti\c2000\C2000Ware_4_03_00_00\device_support\f2837xd\common\include
why should i go for the examples?
Your problem is compilation. The example compiles OK so use this as the starting point.
the code that i have share with you was ours.
I'm saying replace the example code with your code.
Can you please try to build the default example and check whether it is building properly? Then try to modify the adc_ppb_delay_cpu01.c with your code. I have done the steps and the example is building properly.
