TMS320F28379D: Trip Zone action priority questions

Hi David,

David Gregg said:

Does the "do nothing" setting automatically give the next "non do nothing" setting  priority?  For example If TZA is set to 3 or do nothing and DCAEVT1 is set to 2 or FORCE LOW.  If a DCAEVT1 trips does it force PWMA low or does it do nothing? 

Setting the action to "Do nothing' is an action of its own. So, in the case you have described, if a DCAEVT1 comes in then nothing will happen because TZA is set to do nothing and that has higher priority. If you don't want any action then you need to leave it as (0 - High Impedance state)

David Gregg said:

Or if I set TZA to FORCE LOW and DCAEVT1 to FORCE HI and a DCAEVT1 comes in will PWMA be FORCE HIGH or LOW?

Same thing has above, because TZA has priority EPWMA will be forced low.

David Gregg said:

If I change from buck mode to boost mode which will require different actions can I reload the action registers safely without issues

You can change the actions but not sure if it will be a "safe" transition, this will depend on your application and where you are updating the actions.

David Gregg said:

The problem I am trying to figure out is how to setup different actions on the PWM A and B outputs depending on whether in BUCK or BOOST mode and still maintain the actions setup for the Oneshot trips.

Can you please describe your ideal configuration? Maybe I can help provide a solution, but I need more details like whether under both scenarios BUCK/BOOST you need to setup a CBC trip? What actions do you need for each? What is your one-shot being used with (ie. DCxEVTs or other signals), what actions are setup for this?

Best Regards,

Marlyn

HI Marlyn,

Thanks for getting back to me.  I have the trips setup the way i want them to be but no matter what I put in the DEVxEVTx action settings TZA and TZB control what the ePWM output is.   There has to be a way to bypass the TZA and TZB settings otherwise the other settings are worthless. Any ideas? 

Hi David,

If you don't want to use TZA/TZB then you need to set their actions to (0 - High Impedance state) - default value.

Best Regards,
Marlyn

I tried that and it didn't seem to matter.  I will try again.

HI Marlyn,  I have tried the Hi Z state and it still seems that the settings for DCxEVT2 have no effect.  Do the GPIOS have to be set a specific way for the HI Z to work?  Or is that just an internal thing?

Hi David,
The GPIOs don't have to be setup in any particular way. Would you mind sharing your trip zone and digital compare settings and I can review them.

Best Regards,
Marlyn

Hi Marlyn,

Sorry I had to work on something else for a while.  I have a question when the TZCTL is set to 0 (HI-Z mode) what exactly does that mean?  Is the actual pin put in a HI-Z state?  I am just wondering if this mode may be useful to me in some way. The trips are happening I just can't get the particular response on the PWM's I want.  When I set the TZA/TZB to HI-Z no matter what the trip is it looks like both PWMA and PWMB goes low (not sure it they are just low or in a HI-Z state).  I figure if the pin is actually in a HI-Z state we may be able to place pull-ups/pull-downs on the outputs to get the desired result.  I just hope that the switch to/from HI-Z is fast enough.

Thanks,

Dave G

Hi David,

David Gregg said:

I have a question when the TZCTL is set to 0 (HI-Z mode) what exactly does that mean? 

The EPWM output will be driven by the actions that you setup while these pins are in high-Z mode. If the output is being driven low then that means that a particular configuration is driving them low. 

David Gregg said:

The trips are happening I just can't get the particular response on the PWM's I want.

Can you please describe your current configuration? How are you ensuring that the trips are taking place? What are your settings for TZCTL/TZCLT2? Additionally, what is your desired output for each of the events happening in your system? 

Best Regards,

Marlyn

I can force a negative overcurrent detect on the CMPSSL and I get a trip that does what ever is in TZA and TZB (DCAEVT2 flag is set).  I can force a positive overcurrent detection on the CMPSSH and the trip does whatever is in TZA and TZB (DCBEVT2 flag is set).  What I want is if DCAEVT2 flag is set I only want EPWMA to be affected and EPWMB will keep running as is.  If DCBEVT2 flag is set I only want EPWMB to be affected and EPWMA to keep running as is.  I don't think this is possible with this controller unless there is a way to completely disable the effects of TZA and TZB settings.  The priority mechanism is useless.

Hi David,

Can you please show me how you have setup your application using this diagram? I don't know if you are using CBC or one-shot for your DCxEVTx or neither.

David Gregg said:

I don't think this is possible with this controller unless there is a way to completely disable the effects of TZA and TZB settings.  The priority mechanism is useless.

Some background on how the logic works without knowing the details of your configuration. If you setup the DCxEVTx events as a CBC or one-shot they go through an OR gate that then propagates to the EPWMxA and EPWMxB blocks. That means that everytime there is a one-shot event or a CBC event both EPWMxA/EPWMxB will be triggered. The event that takes place upon a trigger is based on the TZCTL register and the extension registers (TZCTL2 and TZCTLDCA/TZCTLDCB). If you don't want one of the channels (A or B) to do something when you have to implement a check to see what trip occured and change the actions in TZCTL accordingly. This is not a straight forward approach.

TZA and TZB have the highest priority so the EPWM modules will behave as indicated through these bits. If you want DCxEVTx to take place then don't set TZA/TZB to anything (keep as default) and setup an action for DCxEVTx. 

Another option is to not go through the CBC or One-shot logic in the trip-zone submodule and just add an action in TZCTL for DCxEVTx. If DCAEVT1/2 take place then only EPWMxA will be triggered and if DCBEVT1/2 take place then only EPWMxB will be triggered. However, the action specified in DCxEVTx bit of TZCTL register will only take place for the duration of the DCxEVTx event. In newer devices we did add a feature to implement a CBC DCxEVT without having to go through the trip zone logic for a CBC.  

Thanks & Best Regards,

Marlyn

Hi Marlyn,  

I think you finally got through the cobwebs in my brain and I see what is going on.  It was the OR gate logic for CBC that was messing me up.  I have a couple questions though.

1. It looks like the CBC flag will not be cleared by the counter resetting to 0.  So I will  have to rely on the cmpss latch being cleared by the syncpulse.  I have that already setup.  Should I increase the window I have in the DC to account for this?  So I don't have the DCxEVTx signal going past he counter == 0 point and I the CBC falsely triggers.
2. I just want to confirm that I don't want anything selected in the TZSEL register for the individual actions for DCxEVTx to work?

Thanks for the help.

Hi David,

I am glad we are making progress!

David Gregg said:

It looks like the CBC flag will not be cleared by the counter resetting to 0

Why would it not clear? The only way you would still see a "CBC" trip is if both CBC and one-shot happen at the same time. In that case, trip would still happen because of the one-shot (OR gate). Otherwise, CBC should be getting cleared based on the action you specify in TZCLR register.

David Gregg said:

So I don't have the DCxEVTx signal going past he counter == 0 point and I the CBC falsely triggers.

Could you elaborate on this? I am not able to follow how you get false CBC triggers.

David Gregg said:

I just want to confirm that I don't want anything selected in the TZSEL register for the individual actions for DCxEVTx to work?

Correct. The trips would only occur for the duration of the digital compare events though. 

Best Regards,

Marlyn

Marlyn Rosales Castaneda20 said:

Why would it not clear? The only way you would still see a "CBC" trip is if both CBC and one-shot happen at the same time. In that case, trip would still happen because of the one-shot (OR gate). Otherwise, CBC should be getting cleared based on the action you specify in TZCLR register.

I was just thinking out loud.  Since the CBC flag will not be set because nothing is in TZSEL there will be nothing to clear and resume regular EPWM operation.  This means I will have to make sure the cmpss latch is cleared to resume regular EPWM operation.  Is there something else I should make sure is cleared when the EPWM counter is 0 to emulate the CBC.

Marlyn Rosales Castaneda20 said:

David Gregg said:

So I don't have the DCxEVTx signal going past he counter == 0 point and I the CBC falsely triggers.

Could you elaborate on this? I am not able to follow how you get false CBC triggers.

I am using blanking in the DC filter to address.

15.11.3 Using CMPSS to Trip the ePWM on a Cycle-by-Cycle Basis
When using the CMPSS to trip the ePWM on a cycle-by-cycle basis, steps should be taken to prevent an
asserted comparator trip state in one PWM cycle from extending into the following cycle. The CMPSS can
be used to signal a trip condition to the downstream ePWM modules. For applications like peak current
mode control, only one trip event per PWM cycle is expected. Under certain conditions, it is possible for a
sustained or late trip event (arriving near the end of a PWM cycle) to carry over into the next PWM cycle if
precautions are not taken. If either the CMPSS Digital Filter or the ePWM Digital Compare (DC)
submodule is configured to qualify the comparator trip signal, “N” number of clock cycles of qualification
will be introduced before the ePWM trip logic can respond to logic changes of the trip signal. Once an
ePWM trip condition is qualified, the trip condition will remain active for N clock cycles after the
comparator trip signal has de-asserted. If a qualified comparator trip signal remains asserted within N
clock cycles prior to the end of a PWM cycle, the trip condition will not be cleared until after the following
PWM cycle has started. Thus, the new PWM cycle will detect a trip condition as soon as it begins.
To avoid this undesired trip condition, the user application should take steps to ensure that the qualified
trip signal seen by the ePWM trip logic is deasserted prior to the end of each PWM cycle. This can be
accomplished through various methods:
• Design the system such that a comparator trip will not be asserted within N clock cycles prior to the
end of the PWM cycle.
• Activate blanking of the comparator trip signal via the ePWM event filter at least two clock cycles prior
to the PWMSYNCPER signal and continue blanking for at least N clock cycles into the next PWM
cycle.
• If the CMPSS COMPxLATCH path is used, clear the COMPxLATCH at least N clock cycles prior to the
end of the PWM cycle. The latch can be cleared by software (via COMPSTSCLR) or by generating an
early PWMSYNCPER signal. The ePWM modules on this device include the ability to generate
PWMSYNCPER upon a CMPC or CMPD match (via HRPCTL) for arbitrary PWMSYNCPER placement
within the PWM cycle.

Thanks

Hi David,

David Gregg said:

I was just thinking out loud.  Since the CBC flag will not be set because nothing is in TZSEL there will be nothing to clear and resume regular EPWM operation.  This means I will have to make sure the cmpss latch is cleared to resume regular EPWM operation.  Is there something else I should make sure is cleared when the EPWM counter is 0 to emulate the CBC.

No, I can't think of anything else that you should clear but I have not personally tried to emulate a CBC trip using just the digital compare events. If you can clear the CMPSS latch on the EPWMSYNCPER signal then I think this should take care of it.

Best Regards,

Marlyn