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TMS320F28388D: question about spract6a

Part Number: TMS320F28388D


Hi Team,

There is an issue from the customer need your help:

Take the simulation circuit diagram on page 10 of the document as an example

I don't quite understand how the processor internally discharges the sample and hold capacitor.

As shown in the figure above, the discharge time of 10nS is designed in the document. Is there any basis for this?

Could you help check this case?

Thanks & Regards,

Ben

  • Hello Ben,

    This is a behavioral model, so not every part of it will necessarily represent real-world performance. What it should do is correctly model the input drive requirements for the modeled ADC, based on our design data. The actual discharge time in this case is not particularly important - in the real world, discharge would not actually happen unless the next conversion was for a zero voltage. Discharge is only needed here for the sake of looping/restarting the sample/hold cap charging model.

    Best regards,
    Ibukun