Hi champs,
On a new F280039CSPZ (100 pins) design, in case of using the internal 1.2V reference :
Is it necessary to connect all VDD pins to the same plane as on the first schematics?
Or could the VDD pins have their owns decoupling capacitors as on the second schematics?
Indeed the datasheet specifies that “In internal VREG mode, tying the VDD pins together is optional as long as each VDD pin has a capacitor on it.”
but we like to be sure that not connecting them will not cause any performance issue.
Thank you!
Best regards,
Guillaume
Schematics 1
Schematics 2