Part Number: TMS320F28386D
When use the example from TI: erad_ex3_stack_overflow_detect
In the code there is
//
// The stack end address
//
extern uint32_t __TI_STACK_END;
But I cannot find the definition of __TI_STACK_END.
Could TI expert help?
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Part Number: TMS320F28386D
When use the example from TI: erad_ex3_stack_overflow_detect
In the code there is
//
// The stack end address
//
extern uint32_t __TI_STACK_END;
But I cannot find the definition of __TI_STACK_END.
Could TI expert help?
Hi,
This is added by the compiler. You may check the .map file for the address.
Regards,
Veena
I am confused that if I change the .stack in CMD file to another RAM zone.
Will this __TI_STACK_END also change with that?
I would like to know the logic behind it.
SECTIONS
{
codestart : > BEGIN, ALIGN(8)
.text : >> FLASH1 | FLASH2 | FLASH3 | FLASH4, ALIGN(8)
.cinit : > FLASH4, ALIGN(8)
.switch : > FLASH1, ALIGN(8)
.reset : > RESET, TYPE = DSECT /* not used, */
.stack : > RAMM1The end address totally depends on at what address .stack gets allocated to and the stack size
Regards,
Veena
The point is that CPU1 and CPU2 have the same .stack.
I suppose __TI_STACK_END shall also the same. But actully they are not.
The point is that CPU1 and CPU2 have the same .stack.
In the linker cmd file you shared, you are just mentioning in which RAM memory should be used for allocating the .stack memory. Note that there are separate .stack section in CPU1 and CPU2. Even the RAMM1 memory as well is available separately for each CPU.
Does both use same stack size? Stack size can be either mentioned in the linker cmd or the Project Linker options

Regards,
Veena