TMS320F28388D: The sigma-delta current value

Cherry Zhou

Part Number: TMS320F28388D

Hi team,

According to the TMS320F2838x real-time Microcontrollers with Connectivity Manager Technical Reference Manual Description of the sampling delay in section28.6.1:

The clock is 20M with a 3sinc filter and a decimation rate of 32. Based on the formula, the calculated delay is 3 x 32 / 20M = 4.8 us

However, according to the ADI's manual, the group delay is half the data setup time (as shown above).

So the customer is confused that is the current value obtained from the register lagging the actual sample current value lag time, calculated from the data settling time of 4.8 us? Or is it based on group delay time 4.8/2 = 2.4 us?

Could you help check this case? Thanks.

Best Regards,

Cherry

over 2 years ago

0 Kevin Allen18 over 2 years ago

TI__Mastermind 45426 points

Hi Cherry,

Can you share the ADI part number they're using? Would need to review their datasheet or document for more context. What OSR value are they using?

Best,

Kevin

0 Cherry Zhou over 2 years ago in reply to Kevin Allen18

TI__Mastermind 22235 points

Hi Kevin,

Thank you for the support.

The customer does not use the ADI device and uses TI's AMC1206M25 modulation device. The information described above is from the description of the sigma-delta device in the ADI link at https://www.analog.com/en/analog-dialogue/articles/optimized-sigma-delta-modulated-current-measurement-for-motor-control.html, please see Figure 2(b) for more details.

Kevin Allen18 said:
What OSR value are they using?

They use an OSR decimation of 32.

Thanks and regards,

Cherry

0 Kevin Allen18 over 2 years ago in reply to Cherry Zhou

TI__Mastermind 45426 points

Hi Cherry,

I'm not familiar with the "group delay" term and why the article states it being 1.5 decimation cycles long. Can you see if the customer has more details and context on the question? Why do they need more information than their delay calculation (3 x 32 / 20M = 4.8 us)?

I'm going to discuss further with a colleague to see if he's familiar with these things as well, but more info would be helpful.

Best,

Kevin

0 Shaoxiong Guo over 2 years ago in reply to Kevin Allen18

Prodigy 70 points

The reason why we want to know the lag time between the sampled current and the actual current sampling point is to build a relevant motor control model in the simulation platform Simulink, in order to evaluate the impact of this delay on the entire system.

0 Cherry Zhou over 2 years ago in reply to Kevin Allen18

TI__Mastermind 22235 points

Hi Kevin,

Thank you and Shaoxing Guo is the end customer, you could keep discuss this issue here, please let me know if any questions.

Hi Shaoxing,

Due to the different timezone, our expert will get back to you soon and thank you for your patience.

Thanks and regards,

Cherry

0 Kevin Allen18 over 2 years ago in reply to Cherry Zhou

TI__Mastermind 45426 points

Hi Shaoxiong,

OK, understand the question now in terms of wanting to simulate what current in the past is sampled by the Delta-sigma ADC. Keep in mind that the filter output will mimic elements of a moving average.

The App Note below has some good information in sections 2 and 3.

https://www.ti.com/lit/sbaa230

For more specific details, I think this question is probably better answered by the AMC1306 team however. I'll move the post over to that forum.

Best,

Kevin

0 Shaoxiong Guo over 2 years ago in reply to Kevin Allen18

Prodigy 70 points

Thank you， Kevin

+1 Alexander Smith over 2 years ago in reply to Shaoxiong Guo

TI__Guru 55342 points

Hi Shaoxiong,

This excel calculator may help: https://www.ti.com/lit/zip/sbar010

I think there is just a difference in how TI and ADI present the same concepts. As Kevin mentioned, there will be a moving average delay in response to a step function on the input of the modulator.

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TMS320F28388D: The sigma-delta current value