Part Number: TMS320F28388D
Other Parts Discussed in Thread: SYSCONFIG, ADS7128,
Dear Sir/Madam,
We are using TMS320F28388D dev kit to test the ADS7128. If I2C_INT_TXFF is enabled in sysconfig with the configuration:
I2C_setFIFOInterruptLevel(i2c0_uc_BASE, I2C_FIFO_TX0, I2C_FIFO_RX1);
The tx interrupt runs forever and cannot be cleared. This is understandable because TXFFST < TXFFIL.
But if the I2C TX FIFO interrupt is disabled in sysconfig and enabled after Board_init, all interrupts cannot be seen. Can you point the following code any issue?
The code is very simple:
I2C_disableModule(i2c0_uc_BASE);
I2C_initController(i2c0_uc_BASE, DEVICE_SYSCLK_FREQ, 400000, I2C_DUTYCYCLE_33);
I2C_setConfig(i2c0_uc_BASE, I2C_CONTROLLER_SEND_MODE | I2C_REPEAT_MODE);
I2C_setTargetAddress(i2c0_uc_BASE, addr);
I2C_disableLoopback(i2c0_uc_BASE);
I2C_setBitCount(i2c0_uc_BASE, I2C_BITCOUNT_8);
I2C_setDataCount(i2c0_uc_BASE, count);
I2C_setAddressMode(i2c0_uc_BASE, I2C_ADDR_MODE_7BITS);
I2C_enableFIFO(i2c0_uc_BASE);
I2C_clearInterruptStatus(i2c0_uc_BASE, I2C_INT_ARB_LOST | I2C_INT_NO_ACK | I2C_INT_RXFF | I2C_INT_TXFF);
I2C_setFIFOInterruptLevel(i2c0_uc_BASE, I2C_FIFO_TX0, I2C_FIFO_RX1);
I2C_enableInterrupt(i2c0_uc_BASE, I2C_INT_ARB_LOST | I2C_INT_NO_ACK | I2C_INT_RXFF | I2C_INT_TXFF);
I2C_setEmulationMode(i2c0_uc_BASE, I2C_EMULATION_FREE_RUN);
I2C_enableModule(i2c0_uc_BASE);
while (I2C_isBusBusy(i2c0_uc_BASE));
// Part one transmission: No interrupt
I2C_putData(i2c0_uc_BASE, OPCODE_SW);
I2C_putData(i2c0_uc_BASE, address);
I2C_putData(i2c0_uc_BASE, value);
I2C_sendStartCondition(i2c0_uc_BASE);
DEVICE_DELAY_US(BUSY_DELAY_100us);
I2C_sendStopCondition(i2c0_uc_BASE);
DEVICE_DELAY_US(BUSY_DELAY_50us);
