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The data sent to the left and right channels through DRR1 and DRR2 (16 bits each) are output by the DAC of the audio chip into sine waves. In the case of different values, the two headset sound channels have the same value, and it seems that the value of DRR1 is used, and the value of DRR2 is directly invalid.
AIC23 set the main mode and left and right channel update has been opened, it seems to be the Master mode USB mode BCLK=MCLK DSP mode 16-bit input data length, I do not know much about this overall process, if there is a document, I hope to recommend it, thank you!!
Reference document: 320AIC23.pdf
Would like to ask seniors to help guide or provide some reference routines, thank you!
AIC23 and DSP are configured as follows:
AIC23 register Settings:
AIC23Write(0x00,0x00);
Delay(100);
AIC23Write(0x02,0x00);
Delay(100);
AIC23Write(0x04,0xff);//Earphone left channel control
Delay(100);
AIC23Write(0x06,0xff);//Earphone right channel control
Delay(100);
AIC23Write(0x08,0x14);//Analog audio path control
Delay(100);
AIC23Write(0x0A,0x00);//Digital audio path control
Delay(100);
AIC23Write(0x0C,0x00);//Power off control
Delay(100);
AIC23Write(0x0E,0x43);//Digital audio interface format looks like Master mode USB mode BCLK=MCLK DSP mode 16 bit input data length.
Delay(100);
AIC23Write(0x10,0x1f);//Sample Rate Control clock is USB mode
Delay(100);
AIC23Write(0x12,0x01);// Digital Interface Activation
Delay(100); //AIC23Init
McbspaRegs.SPCR1.all=0;
McbspaRegs.SPCR2.all=0;
McbspaRegs.SPCR1.all = SPCR10_VAL;
McbspaRegs.SPCR2.all = SPCR20_VAL; //When the simulation stops, the serial clock continues to run
McbspaRegs.PCR.all = PCR0_VAL; //Rising edge sampling
McbspaRegs.XCR1.all = XCR10_VAL;
McbspaRegs.XCR2.all = XCR20_VAL;
McbspaRegs.RCR1.all = RCR10_VAL;
McbspaRegs.RCR2.all = RCR20_VAL;
McbspaRegs.DXR1.all = 0;//clear data
McbspaRegs.MFFINT.bit.RINT = 1;//Interrupt management
McbspaRegs.SPCR1.bit.RRST = 1;//Open serial port reception
McbspaRegs.SPCR2.bit.XRST = 1;//Enable serial port transmission
