TMS320F28386D: CPUTOCMRAM size

Benito Carotenuto

Dear experts and TI developers,

I have a question about the size of the CPU2TOCMMSGRAM.

Within the TI linker of CPU2 (2838x_FLASH_lnk_cpu2.cmd), the size of this memory is 0x800 for each direction (2KB)

   CPUTOCMRAM      : origin = 0x039000, length = 0x000800
   CMTOCPURAM      : origin = 0x038000, length = 0x000800

On the other hand, in accordance with the TI linker of CM (2838x_FLASH_lnk_cm.cmd) there are 2 sections of 0x800; therefore, the whole size in 0x1000 for each direction (4KB)

   CPU2TOCMMSGRAM0  : origin = 0x20084000, length = 0x00000800
   CPU2TOCMMSGRAM1  : origin = 0x20084800, length = 0x00000800
   CMTOCPU2MSGRAM0  : origin = 0x20086000, length = 0x00000800
   CMTOCPU2MSGRAM1  : origin = 0x20086800, length = 0x00000800

I noticed an inconsistency within the documentation (SPRSP14E – MAY 2019 – REVISED JUNE 2023).

Here, in accordance with the memory map in Table 8-1, there are 2 sections of 0x400. Therefore, the whole size is 0x800 for each direction (2KB)

On the other hand, in table 5.1 of the same document reports on a memory size equal to 4KB for each direction...

Please, could you clarify me what is the size of the shared RAM between CM and CPU2?

Thank you.

Best regards,

Benito

over 3 years ago

0 Siddharth Deshpande over 3 years ago

TI__Mastermind 37235 points

Bentio,

Will forward your query to an expert.

Best Regards

Siddharth

0 Benito Carotenuto over 3 years ago in reply to Siddharth Deshpande

Intellectual 366 points

Dear mr. Siddharth Deshpande,

thank you.

I will wait for a feedback from an expert.

Best regards.

Benito

0 Veena Kamath over 3 years ago in reply to Benito Carotenuto

TI__Mastermind 32695 points

Hi Benito,

Please note that the size mentioned in C28 linker cmd file is in terms of 16 bit words, whereas in CM size is expressed in 8 bit bytes

CPU to CM - 2 MSGRAMs each with 1k*16 bits or 2k* 8bits.=> Total 4kB (byte=8 bits) . There are Dedicated MSGRAMs for each direction

In the C28 linker, we have added one entry for both MSGRAMs, But you could split them if needed. Size = 4kB => 2k * 16 bits => 0x800

CM linker : Size = 4kb => 4k * 8bits => 0x1000

Hope this helps!

Regards,

Veena

0 Benito Carotenuto over 3 years ago in reply to Veena Kamath

Intellectual 366 points

Dear Veena Kamath,

thank you for your answer.

Regardless to the core (CM, CPU), how do I know to understand if the length of a Flash/Ram sector in the linker file is in terms of 1byte or 2 bytes?

There are no information about this...

Should I set the compiler to properly process the length of the linker for each core?

Regards,

Benito

+1 Veena Kamath over 3 years ago in reply to Benito Carotenuto

TI__Mastermind 32695 points

In the data sheet MmeoryMap table, x8 r x16 is mentioned in the size column to indicate whether it is in terms if 8 bits or 16 bits.

In linker cmd file, size is mentioned in terms of how compiler interprets the addresses : size = 1 means 8 bits for ARM, 16 bits for C28x

The following appnote might be useful :

https://www.ti.com/lit/an/sprad88a/sprad88a.pdf

Regards,

Veena

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TMS320F28386D: CPUTOCMRAM size