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TMS320F28388S: Software controlled firmware update process

Part Number: TMS320F28388S


Hello,

What are steps for "Software controlled firmware update process"  specific to TMS320F28388S.

Basically i am looking for code to switch between SCI and flash boot mode based on logic level present on GPIO 15.

and configuring custom boot mode.

I tried changes mentioned in Application Report SPRACN1-May-2019 but not able to find out Z1_BOOTDEF_LOW, Z1_BOOTDEF_HIGH and Z1_BOOTPIN_CONFIG  as controller is different.

  • Hi Prashant,

    You can find relevant information in F28388S TRM boot rom chapter.

    Table 5-9. CPU1 BOOTPINCONFIG Bit Fields for configuring Z1_BOOTPIN_CONFIG

    Table 5-11. CPU1 BOOTDEF Bit Fields for configuring Z1_BOOTDEF_LOW, Z1_BOOTDEF_HIGH

    Thanks and regards,

    Pawan

  • Thanks Pawan for your response.

    I tried writing OTP memory using Dual code security tool (DCSM_security_tool.syscfg) through code composer studio.
    Below is configuration i set ( Snapshot attached for more details )
      Number of boot pins : 1
      Boot pin 0 (BMSP0) : GPIO15
      BOOTDEF0 : (Flash entry address =0x00080000
      BOOTDEF1 : SCIATX & SCIARX


    While writing this configuration on board #1 observed below error printed in red.

    Also please note that this first time we are programming OTP memory device i.e OTP memory is not already programmed.

    For Board #1 

    C28xx_CPU1: GEL Output:
    CM is out of reset and configured to wait boot.
    (If you connected previously, may have to resume CM to reach wait boot loop.)
    C28xx_CPU1: Error during Flash Programming. Address 0x00078004, FMSTAT (STATCMD on some devices) 0x00000030
    C28xx_CPU1: Please make sure the memory location you are programming have not already been programmed.

    For Board #2 observed below error,

    (If you connected previously, may have to resume CPU2 to reach wait boot loop.)
    C28xx_CPU1: GEL Output:
    CM is out of reset and configured to wait boot.
    (If you connected previously, may have to resume CM to reach wait boot loop.)
    C28xx_CPU1: Error during Flash Programming. Address 0x0007801C, FMSTAT (STATCMD on some devices) 0x00000030
    C28xx_CPU1: Please make sure the memory location you are programming have not already been programmed.

  • Hi Prashant,

    Please check if the OTP locations are already programmed through the memory browser window.

    Can you share the generated dcsm.asm file and the memory browser snapshot.

    Thanks and regards,

    Pawan

  • Hi Pawan,

    Can we take this further over 1:1 email? 

    Please share your email id.

    Thanks

    Prashant Patil

    prashantpatil2@eaton.com

  • Hi Prashant,

    It would be better to discuss on this forum as I can involve other subject matter experts as needed. If you are not comfortable with sharing the generated files, please share on the private message.

    Thanks and regards,

    Pawan

  • Hi Prashant,

    I will close this thread since the discussion has moved to private mode. You can reopen this at a later time if required.

    Thanks and regards, Pawan