Other Parts Discussed in Thread: C2000WARE
Dear TI,
I'm encountering multiple issues while attempting to configure the PLL clock for my project . I'm using the TI function to set the configuration.
Specifically, the following line in the IniSysPll() that check the overflow of timers (1&2), the execution is stoped in this line cause timer 2 is not runing
while((s_sDrvTIM_CoreCpuTimer2Regs.TCR.bit.TIF == 0) && (s_sDrvTIM_CoreCpuTimer1Regs.TCR.bit.TIF == 0));
I'm uncertain if my DSP is resetting each time, and I'm struggling to comprehend why my timer 2 isn't counting even when I'm using the identical code provided by TI.
Is there a register that tracks the number of resets caused by the watchdog? How can we verify the source of the reset if it occurs?
I coudl notice aslo that some EALLOW are not followed by EDIS in this funciton is it normale?
Thank you in advance.
Sincerely, Tarik