Other Parts Discussed in Thread: C2000WARE
Hi,
I am making an application that I am trying to download to target (F28379D). This is done from my computer with the C2000 serial_flash_programmer. On the target side, I am using the C2000 SCI flash programmer (but in FLASH).
My application has its BEGIN vector at (0x098000, length=2) and the rest of the code at FLASHG and FLASHH. It is made that way to make space for a secondary bootloader (FLASHA-FLASHF).
I am using the C2000 Hex Utility tool with parameters as recommended (--boot --sci8 --ascii). When I download the firmware file I get an error. The error comes because there is a destination address that is outside of bounds. This is easier to see if I change to the intel hex format:
:020000040001F9
:20A0000000009049B0C92C163048747B059680AF36C82EE173FA86098316B622A22FCF3B26
For some reason, there is about 1,3kB code from address 0x01A000. In the linker file, the address is related to this line:
RAMGS14 : origin = 0x01A000, length = 0x001000
RAMGS15 : origin = 0x01B000, length = 0x000FF8
That is a RAM sector. Why is that even in my firmware output file? I can't see that is is used anywhere in the code. If I comment the RAMGS14 line in the linker file I get:
:020000040001F9
:20B0000000009049B0C92C163048747B059680AF36C82EE173FA86098316B622A22FCF3B16
This comes from the RAMGS15 sector. If I comment that line I get:
:020000040008F2
:2000000000009049B0C92C163048747B059680AF36C82EE173FA86098316B622A22FCF3BC6
That comes from the line:
FLASHA : origin = 0x080000, length = 0x002000
...which is not used either in my code...
Finally, if I comment the FALSHA line out in the linker file, I get the output that I expected - firmware code that starts from FLASHG through FLASHH.
My question is: Why do I get these extra code sections?
The linker file looks like this:
MEMORY
{
PAGE 0 : /* Program Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
/* BEGIN is used for the "boot to Flash" bootloader mode */
BEGIN : origin = 0x098000, length = 0x000002 // MAG: Was 0x080000, 0x000002 origin = 0x098000, length = 0x000002
//RAM_RES_BOOT_ROM : origin = 0x000002, length = 0x000121 // Reserved
RAMM0 : origin = 0x000123, length = 0x0002DD
//RAM_RES_TI_RTOS : origin = 0x000780, length = 0x000080 // Reserved
RAMD0 : origin = 0x00B000, length = 0x000800
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RAMGS14 : origin = 0x01A000, length = 0x001000
RAMGS15 : origin = 0x01B000, length = 0x000FF8
// RAMGS15_RSVD : origin = 0x01BFF8, length = 0x000008 // Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory"
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
//FLASH_TI_OTP : origin = 0x070000, length = 0x000400 // Listed in data sheets
//DCSM_OTP : origin = 0x078000, lenght = 0x000400 // Listed in data sheets (User configurable)
FLASHA : origin = 0x080000, length = 0x002000 /* on-chip Flash */ // MAG: Was 0x080002, length = 0x001FFE
// FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */ Reserved for bootloader
// FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */ Reserved ...
// FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */ Reserved ...
// FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */ Reserved ...
// FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */ Reserved ...
FLASHG : origin = 0x098002, length = 0x007FFE /* on-chip Flash */ // MAG: Was 0x098000, 0x008000 but changed because of codestart
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
// FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */ Reserved for upload new application
// FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */ Reserved ...
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x001FF0 /* on-chip Flash */
// SECURE_ROM : origin = 0x3F0000, length = 0x008000 // Listed in data sheets
// BOOT_ROM : origin = 0x3F8000, length = 0x007FC0 // Listed in data sheets
// VECTORS : origin = 0x3FFFC0, length = 0x000040 // Listed in data sheets
// FLASHN_RSVD : origin = 0x0BFFF0, length = 0x000010 // Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */
BOOT_RSVD : origin = 0x000002, length = 0x000121 // Part of M0, BOOT rom will use this for stack
RAMM1 : origin = 0x000400, length = 0x0003F8 // on-chip RAM block M1
// RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 // Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory"
RAMD1 : origin = 0x00B800, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
// RAMGS11 : origin = 0x017000, length = 0x000FF8 // Uncomment for F28374D, F28376D devices
// RAMGS11_RSVD : origin = 0x017FF8, length = 0x000008 // Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory"
RAMGS11 : origin = 0x017000, length = 0x001000
RAMGS12 : origin = 0x018000, length = 0x001000
RAMGS13 : origin = 0x019000, length = 0x001000
CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
}
SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHG | FLASHH PAGE = 0, ALIGN(8)
.text : >> FLASHG | FLASHH PAGE = 0, ALIGN(8)
codestart : > BEGIN PAGE = 0, ALIGN(8)
/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
.switch : > FLASHG PAGE = 0, ALIGN(8)
.reset : > RESET, PAGE = 0, TYPE = DSECT // DSECT = not used
#if defined(__TI_EABI__) // ELF-based ABI
.init_array : > FLASHG, PAGE = 0, ALIGN(8)
.bss : >> RAMGS2 | RAMGS3 | RAMGS4 | RAMGS5 | RAMGS6 | RAMGS7 | RAMGS8 | RAMGS9 | RAMGS10 | RAMGS11 | RAMGS12 | RAMGS13, PAGE = 1
.bss:output : > RAMLS3, PAGE = 0
.bss:cio : > RAMLS5, PAGE = 1
.data : >> RAMLS5 | RAMGS0 | RAMGS1, PAGE = 1
.sysmem : > RAMLS5 | RAMGS0, PAGE = 1
/* Initalized sections go in Flash */
.const : > FLASHH, PAGE = 0, ALIGN(8)
#else
.pinit : > FLASHG, PAGE = 0, ALIGN(8)
.ebss : >> RAMLS5 | RAMGS0 | RAMGS1, PAGE = 1
.esysmem : > RAMLS5, PAGE = 1
.cio : > RAMLS5, PAGE = 1
/* Initalized sections go in Flash */
.econst : >> FLASHH PAGE = 0, ALIGN(8)
#endif
Modbus : >> RAMGS13, PAGE = 1
Filter_RegsFile : > RAMGS0, PAGE = 1
SHARERAMGS0 : > RAMGS0, PAGE = 1
SHARERAMGS1 : > RAMGS1, PAGE = 1
SHARERAMGS2 : > RAMGS2, PAGE = 1
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
#if defined(__TI_EABI__)
.TI.ramfunc : {} LOAD = FLASHG,
RUN = RAMLS0,
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
PAGE = 0, ALIGN(8)
#else
.TI.ramfunc : {} LOAD = FLASHG,
RUN = RAMLS0,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(8)
#endif
#else
ramfuncs : LOAD = FLASHG,
RUN = RAMLS0,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(8)
#endif
#endif
/* The following section definitions are required when using the IPC API Drivers */
GROUP : > CPU1TOCPU2RAM, PAGE = 1
{
PUTBUFFER
PUTWRITEIDX
GETREADIDX
}
GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
}
/* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
C2000 version 4_03_00_00
Code Composer Studio version: 12.2.0.00009