Part Number: TMDSCNCD28379D
Other Parts Discussed in Thread: C2000WARE
Hello,
In our application we will be booting from FLASH the majority of the time. We want to be able to perform firmware updates periodically. It looks like we would use the default OTP setting of booting from FLASH in our case since that is how we want to boot the majority of the time. I am not sure there is a way to switch BOOT modes between FLASH and USB?
I am guessing there is not.
If that is correct the only thing I can think of is to incorporate BOOT ROM code found at: C:\ti\c2000\C2000Ware_4_03_00_00\libraries\boot_rom\f2837xd\revB into the application. To test this, I started with the led_ex1_blinky application running out of FLASH. I do the following:
- Incorporate the USB BOOT ROM code into the led_ex1_blinky application
- Before entering while(1) loop check to see if the USB is attached
- If it is not, I continue on and start executing the led_ex1_blinky application
- If it is I call USB_Boot()
void main(void)
{
//
// Initialize device clock and peripherals
//
Device_init();
//
// Initialize GPIO and configure the GPIO pin as a push-pull output
//
Device_initGPIO();
GPIO_setPadConfig(DEVICE_GPIO_PIN_LED1, GPIO_PIN_TYPE_STD);
GPIO_setDirectionMode(DEVICE_GPIO_PIN_LED1, GPIO_DIR_MODE_OUT);
//
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
//
Interrupt_initModule();
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
//
Interrupt_initVectorTable();
//
// Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
//
EINT;
ERTM;
uint32_t gpio46_value = GPIO_readPin(46);
if(gpio46_value == 1) //Checking whether USB is connected or not.
{
DevCfgRegs.DC12.bit.USB_A = 1;
Uint32 EntryAddr = USB_Boot(USB_BOOT); //Calling USB_Boot function.
return EntryAddr;
}
//
// Loop Forever
//
for(;;)
{
//
// Turn on LED
//
GPIO_writePin(DEVICE_GPIO_PIN_LED1, 0);
//
// Delay for a bit.
//
DEVICE_DELAY_US(500000);
//
// Turn off LED
//
GPIO_writePin(DEVICE_GPIO_PIN_LED1, 1);
//
// Delay for a bit.
//
DEVICE_DELAY_US(500000);
}
}
In USB_Boot() it is stuck in USB_Boot_Init() specifically: while (ClkCfgRegs.SYSPLLSTS.bit.LOCKS != 1) {;} //Wait for the PLL to lock
//Initialize the USB module
void USB_Boot_Init()
{
uint32_t EntryAddr = 0xFFFFFFFF;
//Soprano
//Lock the main PLL< aux PLL and enable the USB module clock
//
//USBCLK = 120 MHz / 2, sourced from the external oscillator for precision
//
//SYSCLK must be greater than USBCLK / 2, according to Design. The PLL minimum
//Fout is 110 MHz, so let's set the multiplier to give 120 MHz and keep the
//output divider at 1.
EALLOW;
ClkCfgRegs.CLKSRCCTL1.bit.OSCCLKSRCSEL = 0x0; //Use INTOSC2 (~10 MHz) as the main PLL clock source
ClkCfgRegs.SYSPLLMULT.all = 12; //Set IMULT to 12, clear FMULT
ClkCfgRegs.SYSPLLCTL1.bit.PLLEN = 1; //Enable the main PLL
ClkCfgRegs.SYSCLKDIVSEL.bit.PLLSYSCLKDIV = 0; //Set PLLSYSCLKDIV to 1
while (ClkCfgRegs.SYSPLLSTS.bit.LOCKS != 1) {;} //Wait for the PLL to lock
ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN = 1; //Turn off the main PLL bypass
ClkCfgRegs.CLKSRCCTL2.bit.AUXOSCCLKSRCSEL = 0x1; //Use XTAL (20 MHz) as the aux PLL clock source
ClkCfgRegs.AUXPLLMULT.all = 6; //Set IMULT to 6, clear FMULT - 120MHz
ClkCfgRegs.AUXPLLCTL1.bit.PLLEN = 1; //Enable the aux PLL
ClkCfgRegs.AUXCLKDIVSEL.bit.AUXPLLDIV = 2/2; //Set AUXPLLDIV to 2
while (ClkCfgRegs.AUXPLLSTS.bit.LOCKS != 1) {;} //Wait for the PLL to lock
ClkCfgRegs.AUXPLLCTL1.bit.PLLCLKEN = 1; //Turn off aux PLL bypass
CpuSysRegs.PCLKCR11.bit.USB_A = 1; //Enable the clock to the USB module
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_13;
if((EntryAddr != 0xFFFFFFFF) &&
(EntryAddr != 0x00000000))
{
/*if OTP is programmed, then call OTP function*/
((void (*)(void))EntryAddr)();
}
//Connect the PHY to the GPIO pins by setting the GPBAMSEL
//bits for GPIOs 42 and 43. VBUS and ID are now de-spec'd
//due to the lack of a 5V fail-safe ESD structure, so
//GPIOs 46 and 47 are not muxed out.
GpioCtrlRegs.GPBAMSEL.bit.GPIO42 = 1;
GpioCtrlRegs.GPBAMSEL.bit.GPIO43 = 1;
EDIS;
//Register the USB interrupt handler and enable CPU interrupts
c1brom_enable_pie_in_boot(0);
EALLOW;
PieVectTable.USBA_INT = &UsbIntHandler;
PieCtrlRegs.PIEIER9.bit.INTx15 = 1;
EDIS;
IER |= M_INT9;
EINT;
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_13;
if((EntryAddr != 0xFFFFFFFF) &&
(EntryAddr != 0x00000000))
{
/*if OTP is programmed, then call OTP function*/
((void (*)(void))EntryAddr)();
}
//Reset the USB driver's global variables
ResetUsbDriver();
//Force USB device mode by setting DEVMODOTG and DEVMOD
USBREG32(USB_O_GPCS) = 0x3;
//Clear active interrupts
USBREG16(USB_O_TXIS);
USBREG16(USB_O_RXIS);
USBREG8(USB_O_IS);
//Set up endpoint 1 for bulk transfers with a 64-byte FIFO
USBREG8(USB_O_EPIDX) = 1;
USBREG8(USB_O_RXFIFOSZ) = 0x03;
USBREG16(USB_O_RXFIFOADD) = 0x100;
USBREG8(USB_O_RXCSRH1) = 0x40;
//Enable USB interrupts for EP0 transmit/receive, EP1 receive, disconnection, and reset
USBREG16(USB_O_TXIE) = 0x0001;
USBREG16(USB_O_RXIE) = 0x0002;
USBREG8(USB_O_IE) = (USB_IE_DISCON | USB_IE_RESET);
//Attach the USB PHY to the bus
USBREG8(USB_O_POWER) |= USB_POWER_SOFTCONN;
}
Any thoughts on what I am doing wrong?
Why is it waiting for the PLL to lock?
Thanks for any help!
Brent