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TMS320F28386S-Q1: C2000 microcontrollers forum

James Thomas
Prodigy 45 points
Part Number: TMDSCNCD28388D
Other Parts Discussed in Thread: C2000WARE, , TMDSHSECDOCK

5315.missing_headers.zip

Project ZIP:

adc_ex4_soc_software_sync.zip

I have used content from various examples from C2000Ware to build a set of programs for CPU1 and CM which communicate w/ IPC on the TMDSCNCD28388D.

We are using a TMDSCNCD28388D with a TMDSHSECDOCK with C2000Ware_4_03_00_00 API from TI. To be clear: this problem occurs on the TMDSCNCD28388D TI development board, but just for context, I'll say we intend to port this software to the F28386S on a custom board in the near future (that's why the F28386S part number is associated with this post). 

At this point, my C28x CPU1 program produces the following message when I load that program:

"C28xx_CPU1: Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map."

I found that if I comment-out statements which reference my data structure "allChannelsReport[]" (mapped to section "MSGRAM_CPU_TO_CM" with "#pragma DATA_SECTION"), the array drops out of the map and the program loads onto CPU1 without issuing the error message.

So now I have two builds - one which produces the error and one which does not (by excluding assignments to my array and dropping it from the map).

I studied the linker .cmd file and I compared the two .map files, but my inexperience is inhibiting me from finding the problem.

I have no linker errors. I have pasted console output for the linker portion and the 'load' portion of each build below.

I have pasted the .map files and the linker command file from these two builds at the bottom of this post .  If needed, I can also provide source code.

What is causing this message to be generated, and how can I remedy the situation?

Linker output for build without load-time section error message:

Building target: "adc_ex4_soc_software_sync.out"
Invoking: C2000 Linker
"C:/ti/ccs1210/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --idiv_support=idiv0 --tmu_support=tmu0 --vcu_support=vcrc -Ooff --define=RAM --define=DEBUG --define=CPU1 --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --abi=eabi -z -m"adc_ex4_soc_software_sync.map" --heap_size=0x200 --stack_size=0x3F8 --warn_sections -i"C:/ti/ccs1210/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib" -i"C:/ti/c2000/C2000Ware_4_03_00_00" -i"C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/syscfg" -i"C:/ti/ccs1210/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --reread_libs --diag_wrap=off --display_error_number --xml_link_info="adc_ex4_soc_software_sync_linkInfo.xml" --entry_point=code_start --rom_model -o "adc_ex4_soc_software_sync.out" "./adc_ex4_soc_software_sync.obj" "./syscfg/board.obj" "./syscfg/c2000ware_libraries.obj" "./hwas_adc_conversions.obj" "./device/device.obj" "./device/f2838x_codestartbranch.obj" "../2838x_RAM_lnk_cpu1.cmd" "C:/ti/c2000/C2000Ware_4_03_00_00/driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" -lc2000ware_libraries.cmd.genlibs -llibc.a
<Linking>
Finished building target: "adc_ex4_soc_software_sync.out"

if 0 == 1 mkdir "C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/simulation"
if 0 == 1 C:/TDM-GCC-64/bin/g++ -c -DCLB_SIM -IC:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc-2.3.3/src -IC:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/include/type3 -IC:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync -IC:/TDM-GCC-64/bin/include -Og -g -gdwarf-3 -gstrict-dwarf -Wall -MMD -MP -MFC:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/simulation/clb_sim.d -MTC:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/simulation/clb_sim.o -IC:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/syscfg -fno-threadsafe-statics -oC:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/simulation/clb_sim.o C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/syscfg/clb_sim.cpp
if 0 == 1 C:/TDM-GCC-64/bin/g++ -DCLB_SIM -Og -g -gdwarf-3 -gstrict-dwarf -Wall -Wl,-Map,C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/simulation/simulation_output.map -LC:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc-2.3.3/build/src -oC:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/simulation/simulation_output.exe C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/simulation/clb_sim.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_FSM_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_HLC_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_LUT4_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_OutputLUT_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_counter_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_counter_top_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_FSM_top_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_LUT4_top_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_OutputLUT_top_SC_model.o -Wl,--start-group -lsystemc -Wl,--end-group
if 0 == 1 "./simulation/simulation_output.exe"
if 0 == 1 C:/ti/ccs1210/ccs/tools/node/node.exe "C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/" "C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/syscfg" "C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/syscfg/clb.dot"
if 0 == 1 mkdir "C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/diagrams"
if 0 == 1 C:/ti/ccs1210/ccs/tools/node/node.exe "C:/ti/c2000/C2000Ware_4_03_00_00/driverlib/.meta/generate_diagrams.js" "C:/ti/c2000/C2000Ware_4_03_00_00" "C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/diagrams" "C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/syscfg"

**** Build Finished ****

Load-Time console output for build without the load-time section error message:

C28xx_CPU1: GEL Output:
Memory Map Initialization Complete
C28xx_CPU1: GEL Output:
... DCSM Initialization Start ...
C28xx_CPU1: GEL Output:
... DCSM Initialization Done ...
C28xx_CPU1: GEL Output:
CPU2 is out of reset and configured to wait boot.
(If you connected previously, may have to resume CPU2 to reach wait boot loop.)
C28xx_CPU1: GEL Output:
CM is out of reset and configured to wait boot.
(If you connected previously, may have to resume CM to reach wait boot loop.)
C28xx_CPU1: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. User code execution from SR could commence after both flash banks are programmed.
C28xx_CPU1: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.
C28xx_CPU1: GEL Output:
... DCSM Initialization Start ...
C28xx_CPU1: GEL Output:
... DCSM Initialization Done ...
C28xx_CPU1: GEL Output:
CPU2 is out of reset and configured to wait boot.
(If you connected previously, may have to resume CPU2 to reach wait boot loop.)
C28xx_CPU1: GEL Output:
CM is out of reset and configured to wait boot.
(If you connected previously, may have to resume CM to reach wait boot loop.)

Linker output for build WITH the load-time section error message:

Building target: "adc_ex4_soc_software_sync.out"
Invoking: C2000 Linker
"C:/ti/ccs1210/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --idiv_support=idiv0 --tmu_support=tmu0 --vcu_support=vcrc -Ooff --define=RAM --define=DEBUG --define=CPU1 --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --abi=eabi -z -m"adc_ex4_soc_software_sync.map" --heap_size=0x200 --stack_size=0x3F8 --warn_sections -i"C:/ti/ccs1210/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib" -i"C:/ti/c2000/C2000Ware_4_03_00_00" -i"C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/syscfg" -i"C:/ti/ccs1210/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --reread_libs --diag_wrap=off --display_error_number --xml_link_info="adc_ex4_soc_software_sync_linkInfo.xml" --entry_point=code_start --rom_model -o "adc_ex4_soc_software_sync.out" "./adc_ex4_soc_software_sync.obj" "./syscfg/board.obj" "./syscfg/c2000ware_libraries.obj" "./hwas_adc_conversions.obj" "./device/device.obj" "./device/f2838x_codestartbranch.obj" "../2838x_RAM_lnk_cpu1.cmd" "C:/ti/c2000/C2000Ware_4_03_00_00/driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" -lc2000ware_libraries.cmd.genlibs -llibc.a
<Linking>
Finished building target: "adc_ex4_soc_software_sync.out"

if 0 == 1 mkdir "C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/simulation"
if 0 == 1 C:/TDM-GCC-64/bin/g++ -c -DCLB_SIM -IC:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc-2.3.3/src -IC:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/include/type3 -IC:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync -IC:/TDM-GCC-64/bin/include -Og -g -gdwarf-3 -gstrict-dwarf -Wall -MMD -MP -MFC:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/simulation/clb_sim.d -MTC:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/simulation/clb_sim.o -IC:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/syscfg -fno-threadsafe-statics -oC:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/simulation/clb_sim.o C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/syscfg/clb_sim.cpp
if 0 == 1 C:/TDM-GCC-64/bin/g++ -DCLB_SIM -Og -g -gdwarf-3 -gstrict-dwarf -Wall -Wl,-Map,C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/simulation/simulation_output.map -LC:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc-2.3.3/build/src -oC:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/simulation/simulation_output.exe C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/simulation/clb_sim.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_FSM_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_HLC_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_LUT4_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_OutputLUT_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_counter_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_counter_top_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_FSM_top_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_LUT4_top_SC_model.o C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_OutputLUT_top_SC_model.o -Wl,--start-group -lsystemc -Wl,--end-group
if 0 == 1 "./simulation/simulation_output.exe"
if 0 == 1 C:/ti/ccs1210/ccs/tools/node/node.exe "C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "C:/ti/c2000/C2000Ware_4_03_00_00/utilities/clb_tool/clb_syscfg/" "C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/syscfg" "C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/syscfg/clb.dot"
if 0 == 1 mkdir "C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/diagrams"
if 0 == 1 C:/ti/ccs1210/ccs/tools/node/node.exe "C:/ti/c2000/C2000Ware_4_03_00_00/driverlib/.meta/generate_diagrams.js" "C:/ti/c2000/C2000Ware_4_03_00_00" "C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/diagrams" "C:/Users/JThomas/HWS_Integration1/adc_ex4_soc_software_sync/CPU1_RAM/syscfg"

**** Build Finished ****

Load-Time console output for build WITH the load-time section error message:

C28xx_CPU1: GEL Output:
Memory Map Initialization Complete
C28xx_CPU1: GEL Output:
... DCSM Initialization Start ...
C28xx_CPU1: GEL Output:
... DCSM Initialization Done ...
C28xx_CPU1: GEL Output:
CPU2 is out of reset and configured to wait boot.
(If you connected previously, may have to resume CPU2 to reach wait boot loop.)
C28xx_CPU1: GEL Output:
CM is out of reset and configured to wait boot.
(If you connected previously, may have to resume CM to reach wait boot loop.)
C28xx_CPU1: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. User code execution from SR could commence after both flash banks are programmed.
C28xx_CPU1: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.
C28xx_CPU1: GEL Output:
... DCSM Initialization Start ...
C28xx_CPU1: GEL Output:
... DCSM Initialization Done ...
C28xx_CPU1: GEL Output:
CPU2 is out of reset and configured to wait boot.
(If you connected previously, may have to resume CPU2 to reach wait boot loop.)
C28xx_CPU1: GEL Output:
CM is out of reset and configured to wait boot.
(If you connected previously, may have to resume CM to reach wait boot loop.)
C28xx_CPU1: Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map.

Unedited linker command file from TI example "driverlib\f2838x\examples\c28x\adc\adc_ex4_soc_software_sync"

MEMORY
{
/* BEGIN is used for the "boot to SARAM" bootloader mode */
BEGIN : origin = 0x000000, length = 0x000002
BOOT_RSVD : origin = 0x000002, length = 0x0001AF /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x0001B1, length = 0x00024F
RAMM1 : origin = 0x000400, length = 0x0003F8 /* on-chip RAM block M1 */
// RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RAMD0 : origin = 0x00C000, length = 0x000800
RAMD1 : origin = 0x00C800, length = 0x000800
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMLS6 : origin = 0x00B000, length = 0x000800
RAMLS7 : origin = 0x00B800, length = 0x000800
RAMGS0 : origin = 0x00D000, length = 0x001000
RAMGS1 : origin = 0x00E000, length = 0x001000
RAMGS2 : origin = 0x00F000, length = 0x001000
RAMGS3 : origin = 0x010000, length = 0x001000
RAMGS4 : origin = 0x011000, length = 0x001000
RAMGS5 : origin = 0x012000, length = 0x001000
RAMGS6 : origin = 0x013000, length = 0x001000
RAMGS7 : origin = 0x014000, length = 0x001000
RAMGS8 : origin = 0x015000, length = 0x001000
RAMGS9 : origin = 0x016000, length = 0x001000
RAMGS10 : origin = 0x017000, length = 0x001000
RAMGS11 : origin = 0x018000, length = 0x001000
RAMGS12 : origin = 0x019000, length = 0x001000
RAMGS13 : origin = 0x01A000, length = 0x001000
RAMGS14 : origin = 0x01B000, length = 0x001000
RAMGS15 : origin = 0x01C000, length = 0x000FF8
// RAMGS15_RSVD : origin = 0x01CFF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

/* Flash sectors */
FLASH0 : origin = 0x080000, length = 0x002000 /* on-chip Flash */
FLASH1 : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASH2 : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASH3 : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASH4 : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASH5 : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASH6 : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASH7 : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASH8 : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASH9 : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASH10 : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASH11 : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASH12 : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASH13 : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
CPU1TOCPU2RAM : origin = 0x03A000, length = 0x000800
CPU2TOCPU1RAM : origin = 0x03B000, length = 0x000800

CPUTOCMRAM : origin = 0x039000, length = 0x000800
CMTOCPURAM : origin = 0x038000, length = 0x000800

CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002
}


SECTIONS
{
codestart : > BEGIN
.text : >> RAMD0 | RAMD1 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3
.cinit : > RAMM0
.switch : > RAMM0
.reset : > RESET, TYPE = DSECT /* not used, */

.stack : > RAMM1
#if defined(__TI_EABI__)
.bss : > RAMLS5
.bss:output : > RAMLS3
.init_array : > RAMM0
.const : > RAMLS5 | RAMLS6
.data : > RAMLS5
.sysmem : > RAMLS4
#else
.pinit : > RAMM0
.ebss : >> RAMLS5 | RAMLS6
.econst : > RAMLS5
.esysmem : > RAMLS5
#endif

ramgs0 : > RAMGS0, type=NOINIT
ramgs1 : > RAMGS1, type=NOINIT

MSGRAM_CPU1_TO_CPU2 > CPU1TOCPU2RAM, type=NOINIT
MSGRAM_CPU2_TO_CPU1 > CPU2TOCPU1RAM, type=NOINIT
MSGRAM_CPU_TO_CM > CPUTOCMRAM, type=NOINIT
MSGRAM_CM_TO_CPU > CMTOCPURAM, type=NOINIT

/* The following section definition are for SDFM examples */
Filter_RegsFile : > RAMGS0
Filter1_RegsFile : > RAMGS1, fill=0x1111
Filter2_RegsFile : > RAMGS2, fill=0x2222
Filter3_RegsFile : > RAMGS3, fill=0x3333
Filter4_RegsFile : > RAMGS4, fill=0x4444
Difference_RegsFile : >RAMGS5, fill=0x3333

.TI.ramfunc : {} > RAMM0

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

Generated map file from build which does NOT have the section error:

******************************************************************************
TMS320C2000 Linker PC v22.6.0
******************************************************************************
>> Linked Wed Jul 19 12:06:28 2023

OUTPUT FILE NAME: <adc_ex4_soc_software_sync.out>
ENTRY POINT SYMBOL: "code_start" address: 00000000


MEMORY CONFIGURATION

name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
BEGIN 00000000 00000002 00000002 00000000 RWIX
BOOT_RSVD 00000002 000001af 00000000 000001af RWIX
RAMM0 000001b1 0000024f 00000018 00000237 RWIX
RAMM1 00000400 000003f8 000003f8 00000000 RWIX
RAMLS0 00008000 00000800 00000800 00000000 RWIX
RAMLS1 00008800 00000800 0000039a 00000466 RWIX
RAMLS2 00009000 00000800 00000000 00000800 RWIX
RAMLS3 00009800 00000800 00000000 00000800 RWIX
RAMLS4 0000a000 00000800 00000200 00000600 RWIX
RAMLS5 0000a800 00000800 000007ca 00000036 RWIX
RAMLS6 0000b000 00000800 00000000 00000800 RWIX
RAMLS7 0000b800 00000800 00000000 00000800 RWIX
RAMD0 0000c000 00000800 00000800 00000000 RWIX
RAMD1 0000c800 00000800 00000800 00000000 RWIX
RAMGS0 0000d000 00001000 00000000 00001000 RWIX
RAMGS1 0000e000 00001000 00000000 00001000 RWIX
RAMGS2 0000f000 00001000 00000000 00001000 RWIX
RAMGS3 00010000 00001000 00000000 00001000 RWIX
RAMGS4 00011000 00001000 00000000 00001000 RWIX
RAMGS5 00012000 00001000 00000000 00001000 RWIX
RAMGS6 00013000 00001000 00000000 00001000 RWIX
RAMGS7 00014000 00001000 00000000 00001000 RWIX
RAMGS8 00015000 00001000 00000000 00001000 RWIX
RAMGS9 00016000 00001000 00000000 00001000 RWIX
RAMGS10 00017000 00001000 00000000 00001000 RWIX
RAMGS11 00018000 00001000 00000000 00001000 RWIX
RAMGS12 00019000 00001000 00000000 00001000 RWIX
RAMGS13 0001a000 00001000 00000000 00001000 RWIX
RAMGS14 0001b000 00001000 00000000 00001000 RWIX
RAMGS15 0001c000 00000ff8 00000000 00000ff8 RWIX
CMTOCPURAM 00038000 00000800 00000088 00000778 RWIX
CPUTOCMRAM 00039000 00000800 00000088 00000778 RWIX
CPU1TOCPU2RAM 0003a000 00000800 00000088 00000778 RWIX
CPU2TOCPU1RAM 0003b000 00000800 00000088 00000778 RWIX
CANA_MSG_RAM 00049000 00000800 00000000 00000800 RWIX
CANB_MSG_RAM 0004b000 00000800 00000000 00000800 RWIX
FLASH0 00080000 00002000 00000000 00002000 RWIX
FLASH1 00082000 00002000 00000000 00002000 RWIX
FLASH2 00084000 00002000 00000000 00002000 RWIX
FLASH3 00086000 00002000 00000000 00002000 RWIX
FLASH4 00088000 00008000 00000000 00008000 RWIX
FLASH5 00090000 00008000 00000000 00008000 RWIX
FLASH6 00098000 00008000 00000000 00008000 RWIX
FLASH7 000a0000 00008000 00000000 00008000 RWIX
FLASH8 000a8000 00008000 00000000 00008000 RWIX
FLASH9 000b0000 00008000 00000000 00008000 RWIX
FLASH10 000b8000 00002000 00000000 00002000 RWIX
FLASH11 000ba000 00002000 00000000 00002000 RWIX
FLASH12 000bc000 00002000 00000000 00002000 RWIX
FLASH13 000be000 00002000 00000000 00002000 RWIX
RESET 003fffc0 00000002 00000000 00000002 RWIX


SECTION ALLOCATION MAP

output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
codestart
* 0 00000000 00000002
00000000 00000002 f2838x_codestartbranch.obj (codestart)

.cinit 0 000001b8 00000014
000001b8 0000000c (.cinit..data.load) [load image, compression = lzss]
000001c4 00000004 (__TI_handler_table)
000001c8 00000004 (__TI_cinit_table)

.reset 0 003fffc0 00000000 DSECT

.stack 0 00000400 000003f8 UNINITIALIZED
00000400 000003f8 --HOLE--

.init_array
* 0 000001b1 00000000 UNINITIALIZED

.sysmem 0 0000a000 00000200 UNINITIALIZED
0000a000 00000004 rts2800_fpu64_eabi.lib : memory.c.obj (.sysmem)
0000a004 000001fc --HOLE--

.data 0 0000a800 00000018 UNINITIALIZED
0000a800 0000000e adc_ex4_soc_software_sync.obj (.data)
0000a80e 00000006 rts2800_fpu64_eabi.lib : exit.c.obj (.data)
0000a814 00000002 : _lock.c.obj (.data:_lock)
0000a816 00000002 : _lock.c.obj (.data:_unlock)

.const 0 0000a818 000007b2
0000a818 000002db adc_ex4_soc_software_sync.obj (.const:.string)
0000aaf3 00000001 --HOLE-- [fill = 0]
0000aaf4 0000010c board.obj (.const:.string)
0000ac00 00000097 driverlib.lib : gpio.obj (.const:.string)
0000ac97 00000001 --HOLE-- [fill = 0]
0000ac98 00000097 : sysctl.obj (.const:.string)
0000ad2f 00000001 --HOLE-- [fill = 0]
0000ad30 00000094 : dcc.obj (.const:.string)
0000adc4 00000094 : spi.obj (.const:.string)
0000ae58 00000088 : ipc.obj (.const:IPC_Instance)
0000aee0 00000055 device.obj (.const:.string)
0000af35 00000001 --HOLE-- [fill = 0]
0000af36 0000004a driverlib.lib : adc.obj (.const:.string)
0000af80 0000004a : ipc.obj (.const:.string)

MSGRAM_CM_TO_CPU
* 0 00038000 00000088 UNINITIALIZED
00038000 00000088 driverlib.lib : ipc.obj (MSGRAM_CM_TO_CPU)

MSGRAM_CPU_TO_CM
* 0 00039000 00000088 UNINITIALIZED
00039000 00000088 driverlib.lib : ipc.obj (MSGRAM_CPU_TO_CM)

MSGRAM_CPU1_TO_CPU2
* 0 0003a000 00000088 UNINITIALIZED
0003a000 00000088 driverlib.lib : ipc.obj (MSGRAM_CPU1_TO_CPU2)

MSGRAM_CPU2_TO_CPU1
* 0 0003b000 00000088 UNINITIALIZED
0003b000 00000088 driverlib.lib : ipc.obj (MSGRAM_CPU2_TO_CPU1)

.TI.ramfunc
* 0 000001b1 00000004
000001b1 00000004 driverlib.lib : sysctl.obj (.TI.ramfunc)

.text.1 0 00008000 00000800
00008000 00000037 driverlib.lib : gpio.obj (.text:GPIO_setQualificationMode)
00008037 00000037 : interrupt.obj (.text:Interrupt_enable)
0000806e 00000036 board.obj (.text:ADC_setupSOC)
000080a4 00000036 driverlib.lib : ipc.obj (.text:IPC_registerInterrupt)
000080da 00000031 : gpio.obj (.text:GPIO_setDirectionMode)
0000810b 0000002f board.obj (.text:ADC_setInterruptSource)
0000813a 0000002e board.obj (.text:ADC_setInterruptSOCTrigger)
00008168 0000002e rts2800_fpu64_eabi.lib : copy_decompress_lzss.c.obj (.text:decompress:lzss)
00008196 0000002d board.obj (.text:mySPI0_init)
000081c3 00000029 rts2800_fpu64_eabi.lib : exit.c.obj (.text)
000081ec 00000028 driverlib.lib : adc.obj (.text:ADC_setMode)
00008214 00000027 : sysctl.obj (.text:SysCtl_pollX1Counter)
0000823b 00000026 board.obj (.text:XBAR_setInputPin)
00008261 00000024 driverlib.lib : dcc.obj (.text:DCC_enableSingleShotMode)
00008285 00000024 : sysctl.obj (.text:DCC_enableSingleShotMode)
000082a9 00000024 : sysctl.obj (.text:SysCtl_selectXTAL)
000082cd 00000024 adc_ex4_soc_software_sync.obj (.text:main)
000082f1 00000021 board.obj (.text:ADC_disableContinuousMode)
00008312 00000021 device.obj (.text:Device_initGPIO)
00008333 00000020 board.obj (.text:ADC_enableInterrupt)
00008353 0000001e adc_ex4_soc_software_sync.obj (.text:ADC_readResult)
00008371 0000001e driverlib.lib : dcc.obj (.text:DCC_setCounter0ClkSource)
0000838f 0000001e : sysctl.obj (.text:DCC_setCounter0ClkSource)
000083ad 0000001e : dcc.obj (.text:DCC_setCounter1ClkSource)
000083cb 0000001e : sysctl.obj (.text:DCC_setCounter1ClkSource)
000083e9 0000001e device.obj (.text:Device_verifyXTAL)
00008407 0000001e driverlib.lib : interrupt.obj (.text:Interrupt_initVectorTable)
00008425 0000001d adc_ex4_soc_software_sync.obj (.text:ADC_getInterruptStatus)
00008442 0000001d rts2800_fpu64_eabi.lib : memcpy.c.obj (.text)
0000845f 0000001c board.obj (.text:ADC_setSOCPriority)
0000847b 0000001c driverlib.lib : dcc.obj (.text:DCC_getErrorStatus)
00008497 0000001c : dcc.obj (.text:DCC_getSingleShotStatus)
000084b3 0000001b adc_ex4_soc_software_sync.obj (.text:ADC_isBaseValid)
000084ce 0000001b board.obj (.text:ADC_isBaseValid)
000084e9 0000001b driverlib.lib : adc.obj (.text:ADC_isBaseValid)
00008504 0000001b board.obj (.text:SPI_isBaseValid)
0000851f 0000001b driverlib.lib : spi.obj (.text:SPI_isBaseValid)
0000853a 0000001b board.obj (.text:XBAR_isBaseValid)
00008555 0000001a driverlib.lib : dcc.obj (.text:DCC_isBaseValid)
0000856f 0000001a : sysctl.obj (.text:DCC_isBaseValid)
00008589 0000001a board.obj (.text:SPI_setEmulationMode)
000085a3 0000001a board.obj (.text:SPI_setPTESignalPolarity)
000085bd 0000001a driverlib.lib : sysctl.obj (.text:SysCtl_getLowSpeedClock)
000085d7 0000001a : sysctl.obj (.text:SysCtl_selectXTALSingleEnded)
000085f1 00000019 board.obj (.text:GPIO_init)
0000860a 00000019 device.obj (.text:IPC_setBootMode)
00008623 00000019 board.obj (.text:U_RESET_init)
0000863c 00000019 board.obj (.text:myGPIO10AdcTrig_init)
00008655 00000019 board.obj (.text:myGPIO11SpiCs_init)
0000866e 00000019 rts2800_fpu64_eabi.lib : boot28.asm.obj (.text)
00008687 00000018 board.obj (.text:SPI_disableFIFO)
0000869f 00000017 device.obj (.text:SysCtl_enablePeripheral)
000086b6 00000017 driverlib.lib : sysctl.obj (.text:SysCtl_enablePeripheral)
000086cd 00000016 board.obj (.text:ADC_setInterruptPulseMode)
000086e3 00000016 board.obj (.text:ADC_setPrescaler)
000086f9 00000016 driverlib.lib : dcc.obj (.text:DCC_disableDoneSignal)
0000870f 00000016 : sysctl.obj (.text:DCC_disableDoneSignal)
00008725 00000016 : dcc.obj (.text:DCC_enableDoneSignal)
0000873b 00000016 device.obj (.text:Device_bootCM)
00008751 00000015 board.obj (.text:ADC_disableBurstMode)
00008766 00000015 driverlib.lib : dcc.obj (.text:DCC_clearDoneFlag)
0000877b 00000015 : sysctl.obj (.text:DCC_clearDoneFlag)
00008790 00000015 : dcc.obj (.text:DCC_clearErrorFlag)
000087a5 00000015 : sysctl.obj (.text:DCC_clearErrorFlag)
000087ba 00000015 : dcc.obj (.text:DCC_disableErrorSignal)
000087cf 00000015 : sysctl.obj (.text:DCC_disableErrorSignal)
000087e4 00000015 device.obj (.text:GPIO_unlockPortConfig)
000087f9 00000007 driverlib.lib : sysctl.obj (.text:SysCtl_resetMCD)

.text.2 0 00008800 0000039a
00008800 00000014 adc_ex4_soc_software_sync.obj (.text:ADC_clearInterruptStatus)
00008814 00000014 board.obj (.text:ADC_clearInterruptStatus)
00008828 00000014 board.obj (.text:CH_FAULT2_init)
0000883c 00000014 board.obj (.text:CH_FAULT3_init)
00008850 00000014 board.obj (.text:CH_FAULT4_init)
00008864 00000014 board.obj (.text:CH_FAULT5_init)
00008878 00000014 board.obj (.text:CH_FAULT6_init)
0000888c 00000014 board.obj (.text:CH_FAULT7_init)
000088a0 00000014 board.obj (.text:CH_FAULT8_init)
000088b4 00000014 driverlib.lib : dcc.obj (.text:DCC_disableModule)
000088c8 00000014 : sysctl.obj (.text:DCC_disableModule)
000088dc 00000014 : dcc.obj (.text:DCC_enableErrorSignal)
000088f0 00000014 : dcc.obj (.text:DCC_enableModule)
00008904 00000014 : sysctl.obj (.text:DCC_enableModule)
00008918 00000014 adc_ex4_soc_software_sync.obj (.text:IPC_waitForAck)
0000892c 00000014 board.obj (.text:RELAY_EN_init)
00008940 00000014 device.obj (.text:SysCtl_deviceCal)
00008954 00000014 adc_ex4_soc_software_sync.obj (.text:SysCtl_setEnetClk)
00008968 00000013 board.obj (.text:ADC_enableConverter)
0000897b 00000013 board.obj (.text:CH_FAULT1_init)
0000898e 00000013 device.obj (.text:Device_enableUnbondedGPIOPullupsFor176Pin)
000089a1 00000013 adc_ex4_soc_software_sync.obj (.text:IPC_sync)
000089b4 00000012 adc_ex4_soc_software_sync.obj (.text:IPC_waitForFlag)
000089c6 00000012 adc_ex4_soc_software_sync.obj (.text:performReset)
000089d8 00000012 adc_ex4_soc_software_sync.obj (.text:setup_IPC)
000089ea 00000011 device.obj (.text:Device_enableUnbondedGPIOPullups)
000089fb 00000011 board.obj (.text:SPI_disableModule)
00008a0c 00000011 board.obj (.text:SPI_enableLoopback)
00008a1d 00000011 board.obj (.text:SPI_enableModule)
00008a2e 00000011 device.obj (.text:SysCtl_setCMClk)
00008a3f 00000011 adc_ex4_soc_software_sync.obj (.text:setup_MCU)
00008a50 0000000f adc_ex4_soc_software_sync.obj (.text:IPC_ackFlagRtoL)
00008a5f 0000000f adc_ex4_soc_software_sync.obj (.text:IPC_clearFlagLtoR)
00008a6e 0000000f adc_ex4_soc_software_sync.obj (.text:IPC_sendResponse)
00008a7d 0000000f adc_ex4_soc_software_sync.obj (.text:IPC_setFlagLtoR)
00008a8c 0000000f device.obj (.text:IPC_setFlagLtoR)
00008a9b 0000000f driverlib.lib : ipc.obj (.text:Interrupt_register)
00008aaa 0000000e adc_ex4_soc_software_sync.obj (.text:GPIO_isPinValid)
00008ab8 0000000e board.obj (.text:GPIO_isPinValid)
00008ac6 0000000e driverlib.lib : gpio.obj (.text:GPIO_isPinValid)
00008ad4 0000000e : interrupt.obj (.text:Interrupt_defaultHandler)
00008ae2 0000000d board.obj (.text:Board_init)
00008aef 0000000d driverlib.lib : interrupt.obj (.text:Interrupt_disableGlobal)
00008afc 0000000d : interrupt.obj (.text:Interrupt_enableGlobal)
00008b09 0000000d device.obj (.text:SysCtl_setLowSpeedClock)
00008b16 0000000c driverlib.lib : sysctl.obj (.text:SysCtl_setPLLSysClk)
00008b22 0000000c rts2800_fpu64_eabi.lib : args_main.c.obj (.text)
00008b2e 0000000b device.obj (.text:SysCtl_isCMReset)
00008b39 0000000b driverlib.lib : sysctl.obj (.text:SysCtl_isCMReset)
00008b44 0000000b : sysctl.obj (.text:SysCtl_isMCDClockFailureDetected)
00008b4f 00000009 board.obj (.text:ADC_init)
00008b58 00000009 rts2800_fpu64_eabi.lib : _lock.c.obj (.text)
00008b61 00000008 device.obj (.text:SysCtl_disableWatchdog)
00008b69 00000008 rts2800_fpu64_eabi.lib : copy_decompress_none.c.obj (.text:decompress:none)
00008b71 00000008 f2838x_codestartbranch.obj (.text)
00008b79 00000007 device.obj (.text:__error__)
00008b80 00000007 board.obj (.text:myINPUTXBARINPUT10_init)
00008b87 00000006 adc_ex4_soc_software_sync.obj (.text:Interrupt_clearACKGroup)
00008b8d 00000003 board.obj (.text:INPUTXBAR_init)
00008b90 00000003 board.obj (.text:SPI_init)
00008b93 00000002 driverlib.lib : interrupt.obj (.text:Interrupt_illegalOperationHandler)
00008b95 00000002 : interrupt.obj (.text:Interrupt_nmiHandler)
00008b97 00000002 rts2800_fpu64_eabi.lib : pre_init.c.obj (.text)
00008b99 00000001 : startup.c.obj (.text)

.text.3 0 0000c000 00000800
0000c000 00000167 device.obj (.text:Device_enableAllPeripherals)
0000c167 00000132 driverlib.lib : sysctl.obj (.text:SysCtl_setClock)
0000c299 00000118 : sysctl.obj (.text:SysCtl_isPLLValid)
0000c3b1 00000113 : sysctl.obj (.text:SysCtl_setAuxClock)
0000c4c4 000000cb : dcc.obj (.text:DCC_verifyClockFrequency)
0000c58f 0000009c adc_ex4_soc_software_sync.obj (.text:reportFaultsAndChannelData)
0000c62b 00000098 board.obj (.text:myADCA_init)
0000c6c3 00000090 adc_ex4_soc_software_sync.obj (.text:IPC_RCV_HWASCMD)
0000c753 00000088 rts2800_fpu64_eabi.lib : fs_div28.asm.obj (.text)
0000c7db 00000025 driverlib.lib : sysctl.obj (.text:SysCtl_controlCMReset)

.text.4 0 0000c800 00000800
0000c800 00000077 adc_ex4_soc_software_sync.obj (.text:setup_ENET_MII)
0000c877 00000075 board.obj (.text:PinMux_init)
0000c8ec 00000073 driverlib.lib : dcc.obj (.text:DCC_setCounterSeeds)
0000c95f 00000073 : sysctl.obj (.text:DCC_setCounterSeeds)
0000c9d2 0000006c : adc.obj (.text:ADC_setINLTrim)
0000ca3e 0000006c hwas_adc_conversions.obj (.text:HAC_convert_levels_to_voltages)
0000caaa 00000063 board.obj (.text:myADCB_init)
0000cb0d 00000061 driverlib.lib : sysctl.obj (.text:SysCtl_getAuxClock)
0000cb6e 00000060 : sysctl.obj (.text:SysCtl_getClock)
0000cbce 0000005c : spi.obj (.text:SPI_setConfig)
0000cc2a 00000058 device.obj (.text:Device_init)
0000cc82 00000054 driverlib.lib : adc.obj (.text:ADC_setOffsetTrim)
0000ccd6 00000054 board.obj (.text:myADCC_init)
0000cd2a 00000053 board.obj (.text:myADCD_init)
0000cd7d 00000052 driverlib.lib : gpio.obj (.text:GPIO_setPadConfig)
0000cdcf 0000004a : ipc.obj (.text:IPC_readCommand)
0000ce19 00000047 : sysctl.obj (.text:SysCtl_selectOscSourceAuxPLL)
0000ce60 00000044 adc_ex4_soc_software_sync.obj (.text:GPIO_writePin)
0000cea4 00000044 board.obj (.text:GPIO_writePin)
0000cee8 00000042 driverlib.lib : sysctl.obj (.text:SysCtl_selectOscSource)
0000cf2a 0000003d : interrupt.obj (.text:Interrupt_initModule)
0000cf67 00000037 : gpio.obj (.text:GPIO_setControllerCore)
0000cf9e 00000037 : gpio.obj (.text:GPIO_setPinConfig)
0000cfd5 0000002b rts2800_fpu64_eabi.lib : autoinit.c.obj (.text:__TI_auto_init_nobinit_nopinit)

MODULE SUMMARY

Module code ro data rw data
------ ---- ------- -------
.\
adc_ex4_soc_software_sync.obj 839 731 14
hwas_adc_conversions.obj 108 0 0
+--+-------------------------------+------+---------+---------+
Total: 947 731 14

.\device\
device.obj 728 85 0
f2838x_codestartbranch.obj 10 0 0
+--+-------------------------------+------+---------+---------+
Total: 738 85 0

.\syscfg\
board.obj 1566 268 0
+--+-------------------------------+------+---------+---------+
Total: 1566 268 0

C:/ti/c2000/C2000Ware_4_03_00_00/driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib
sysctl.obj 1785 151 0
ipc.obj 143 210 544
dcc.obj 663 148 0
gpio.obj 310 151 0
adc.obj 259 74 0
spi.obj 119 148 0
interrupt.obj 190 0 0
+--+-------------------------------+------+---------+---------+
Total: 3469 882 544

C:\ti\ccs1210\ccs\tools\compiler\ti-cgt-c2000_22.6.0.LTS\lib\rts2800_fpu64_eabi.lib
fs_div28.asm.obj 136 0 0
exit.c.obj 41 0 6
copy_decompress_lzss.c.obj 46 0 0
autoinit.c.obj 43 0 0
memcpy.c.obj 29 0 0
boot28.asm.obj 25 0 0
_lock.c.obj 9 0 4
args_main.c.obj 12 0 0
copy_decompress_none.c.obj 8 0 0
pre_init.c.obj 2 0 0
startup.c.obj 1 0 0
+--+-------------------------------+------+---------+---------+
Total: 352 0 10

Heap: 0 0 512
Stack: 0 0 1016
Linker Generated: 0 20 0
+--+-------------------------------+------+---------+---------+
Grand Total: 7072 1986 2096


LINKER GENERATED COPY TABLES

__TI_cinit_table @ 000001c8 records: 1, size/record: 4, table size: 4
.data: load addr=000001b8, load size=0000000c bytes, run addr=0000a800, run size=00000018 bytes, compression=lzss


LINKER GENERATED HANDLER TABLE

__TI_handler_table @ 000001c4 records: 2, size/record: 2, table size: 4
index: 0, handler: __TI_decompress_lzss
index: 1, handler: __TI_decompress_none


GLOBAL DATA SYMBOLS: SORTED BY DATA PAGE

address data page name
-------- ---------------- ----
00000400 10 (00000400) __stack

0000a000 280 (0000a000) _sys_memory

0000a800 2a0 (0000a800) DEBUG_PASS
0000a801 2a0 (0000a800) gRunMode
0000a802 2a0 (0000a800) gOpcode
0000a803 2a0 (0000a800) gUpdateChannel
0000a804 2a0 (0000a800) processCmd
0000a806 2a0 (0000a800) gUpdateRefV_uv
0000a808 2a0 (0000a800) isrCount
0000a80a 2a0 (0000a800) base
0000a80c 2a0 (0000a800) DEBUG_COUNTER_IPC_RCV
0000a80e 2a0 (0000a800) __TI_enable_exit_profile_output
0000a810 2a0 (0000a800) __TI_cleanup_ptr
0000a812 2a0 (0000a800) __TI_dtors_ptr
0000a814 2a0 (0000a800) _lock
0000a816 2a0 (0000a800) _unlock

0000ae58 2b9 (0000ae40) IPC_Instance

00038000 e00 (00038000) IPC_CPU_To_CM_GetBuffer

00039000 e40 (00039000) IPC_CPU_To_CM_PutBuffer

0003a000 e80 (0003a000) IPC_CPU1_To_CPU2_PutBuffer

0003b000 ec0 (0003b000) IPC_CPU1_To_CPU2_GetBuffer


GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name

page address name
---- ------- ----
0 00008b4f ADC_init
0 0000c9d2 ADC_setINLTrim
0 000081ec ADC_setMode
0 0000cc82 ADC_setOffsetTrim
0 00008ae2 Board_init
0 000081c3 C$$EXIT
0 0000897b CH_FAULT1_init
0 00008828 CH_FAULT2_init
0 0000883c CH_FAULT3_init
0 00008850 CH_FAULT4_init
0 00008864 CH_FAULT5_init
0 00008878 CH_FAULT6_init
0 0000888c CH_FAULT7_init
0 000088a0 CH_FAULT8_init
0 0000c4c4 DCC_verifyClockFrequency
0 0000a80c DEBUG_COUNTER_IPC_RCV
0 0000a800 DEBUG_PASS
0 0000873b Device_bootCM
0 0000c000 Device_enableAllPeripherals
0 000089ea Device_enableUnbondedGPIOPullups
0 0000898e Device_enableUnbondedGPIOPullupsFor176Pin
0 0000cc2a Device_init
0 00008312 Device_initGPIO
0 000083e9 Device_verifyXTAL
0 000085f1 GPIO_init
0 0000cf67 GPIO_setControllerCore
0 000080da GPIO_setDirectionMode
0 0000cd7d GPIO_setPadConfig
0 0000cf9e GPIO_setPinConfig
0 00008000 GPIO_setQualificationMode
0 0000ca3e HAC_convert_levels_to_voltages
0 00008b8d INPUTXBAR_init
0 0003b000 IPC_CPU1_To_CPU2_GetBuffer
0 0003a000 IPC_CPU1_To_CPU2_PutBuffer
0 00038000 IPC_CPU_To_CM_GetBuffer
0 00039000 IPC_CPU_To_CM_PutBuffer
0 0000ae58 IPC_Instance
0 0000c6c3 IPC_RCV_HWASCMD
0 0000cdcf IPC_readCommand
0 000080a4 IPC_registerInterrupt
0 00008037 Interrupt_enable
0 0000cf2a Interrupt_initModule
0 00008407 Interrupt_initVectorTable
0 0000c877 PinMux_init
0 0000892c RELAY_EN_init
0 00008b90 SPI_init
0 0000cbce SPI_setConfig
0 0000c7db SysCtl_controlCMReset
0 000001b1 SysCtl_delay
0 0000cb0d SysCtl_getAuxClock
0 0000cb6e SysCtl_getClock
0 000085bd SysCtl_getLowSpeedClock
0 0000c299 SysCtl_isPLLValid
0 0000cee8 SysCtl_selectOscSource
0 0000ce19 SysCtl_selectOscSourceAuxPLL
0 000082a9 SysCtl_selectXTAL
0 000085d7 SysCtl_selectXTALSingleEnded
0 0000c3b1 SysCtl_setAuxClock
0 0000c167 SysCtl_setClock
0 00008623 U_RESET_init
0 000001c8 __TI_CINIT_Base
0 000001cc __TI_CINIT_Limit
0 000001cc __TI_CINIT_Warm
0 000001c4 __TI_Handler_Table_Base
0 000001c8 __TI_Handler_Table_Limit
0 000007f8 __TI_STACK_END
abs 000003f8 __TI_STACK_SIZE
abs 00000200 __TI_SYSMEM_SIZE
0 0000cfd5 __TI_auto_init_nobinit_nopinit
0 0000a810 __TI_cleanup_ptr
0 00008168 __TI_decompress_lzss
0 00008b69 __TI_decompress_none
0 0000a812 __TI_dtors_ptr
0 0000a80e __TI_enable_exit_profile_output
abs ffffffff __TI_pprof_out_hndl
abs ffffffff __TI_prof_data_size
abs ffffffff __TI_prof_data_start
0 0000c753 __c28xabi_divf
n/a UNDEFED __c_args__
0 00008b79 __error__
0 00000400 __stack
0 00008b22 _args_main
0 0000866e _c_int00
0 0000a814 _lock
0 00008b60 _nop
0 00008b5c _register_lock
0 00008b58 _register_unlock
0 0000a000 _sys_memory
0 00008b99 _system_post_cinit
0 00008b97 _system_pre_init
0 0000a816 _unlock
0 000081c3 abort
0 0000a80a base
0 00000000 code_start
0 000081c5 exit
0 0000a802 gOpcode
0 0000a801 gRunMode
0 0000a803 gUpdateChannel
0 0000a806 gUpdateRefV_uv
0 0000a808 isrCount
0 000082cd main
0 00008442 memcpy
0 0000c62b myADCA_init
0 0000caaa myADCB_init
0 0000ccd6 myADCC_init
0 0000cd2a myADCD_init
0 0000863c myGPIO10AdcTrig_init
0 00008655 myGPIO11SpiCs_init
0 00008b80 myINPUTXBARINPUT10_init
0 00008196 mySPI0_init
0 000089c6 performReset
0 0000a804 processCmd
0 0000c58f reportFaultsAndChannelData
0 0000c800 setup_ENET_MII
0 000089d8 setup_IPC
0 00008a3f setup_MCU


GLOBAL SYMBOLS: SORTED BY Symbol Address

page address name
---- ------- ----
0 00000000 code_start
0 000001b1 SysCtl_delay
0 000001c4 __TI_Handler_Table_Base
0 000001c8 __TI_CINIT_Base
0 000001c8 __TI_Handler_Table_Limit
0 000001cc __TI_CINIT_Limit
0 000001cc __TI_CINIT_Warm
0 00000400 __stack
0 000007f8 __TI_STACK_END
0 00008000 GPIO_setQualificationMode
0 00008037 Interrupt_enable
0 000080a4 IPC_registerInterrupt
0 000080da GPIO_setDirectionMode
0 00008168 __TI_decompress_lzss
0 00008196 mySPI0_init
0 000081c3 C$$EXIT
0 000081c3 abort
0 000081c5 exit
0 000081ec ADC_setMode
0 000082a9 SysCtl_selectXTAL
0 000082cd main
0 00008312 Device_initGPIO
0 000083e9 Device_verifyXTAL
0 00008407 Interrupt_initVectorTable
0 00008442 memcpy
0 000085bd SysCtl_getLowSpeedClock
0 000085d7 SysCtl_selectXTALSingleEnded
0 000085f1 GPIO_init
0 00008623 U_RESET_init
0 0000863c myGPIO10AdcTrig_init
0 00008655 myGPIO11SpiCs_init
0 0000866e _c_int00
0 0000873b Device_bootCM
0 00008828 CH_FAULT2_init
0 0000883c CH_FAULT3_init
0 00008850 CH_FAULT4_init
0 00008864 CH_FAULT5_init
0 00008878 CH_FAULT6_init
0 0000888c CH_FAULT7_init
0 000088a0 CH_FAULT8_init
0 0000892c RELAY_EN_init
0 0000897b CH_FAULT1_init
0 0000898e Device_enableUnbondedGPIOPullupsFor176Pin
0 000089c6 performReset
0 000089d8 setup_IPC
0 000089ea Device_enableUnbondedGPIOPullups
0 00008a3f setup_MCU
0 00008ae2 Board_init
0 00008b22 _args_main
0 00008b4f ADC_init
0 00008b58 _register_unlock
0 00008b5c _register_lock
0 00008b60 _nop
0 00008b69 __TI_decompress_none
0 00008b79 __error__
0 00008b80 myINPUTXBARINPUT10_init
0 00008b8d INPUTXBAR_init
0 00008b90 SPI_init
0 00008b97 _system_pre_init
0 00008b99 _system_post_cinit
0 0000a000 _sys_memory
0 0000a800 DEBUG_PASS
0 0000a801 gRunMode
0 0000a802 gOpcode
0 0000a803 gUpdateChannel
0 0000a804 processCmd
0 0000a806 gUpdateRefV_uv
0 0000a808 isrCount
0 0000a80a base
0 0000a80c DEBUG_COUNTER_IPC_RCV
0 0000a80e __TI_enable_exit_profile_output
0 0000a810 __TI_cleanup_ptr
0 0000a812 __TI_dtors_ptr
0 0000a814 _lock
0 0000a816 _unlock
0 0000ae58 IPC_Instance
0 0000c000 Device_enableAllPeripherals
0 0000c167 SysCtl_setClock
0 0000c299 SysCtl_isPLLValid
0 0000c3b1 SysCtl_setAuxClock
0 0000c4c4 DCC_verifyClockFrequency
0 0000c58f reportFaultsAndChannelData
0 0000c62b myADCA_init
0 0000c6c3 IPC_RCV_HWASCMD
0 0000c753 __c28xabi_divf
0 0000c7db SysCtl_controlCMReset
0 0000c800 setup_ENET_MII
0 0000c877 PinMux_init
0 0000c9d2 ADC_setINLTrim
0 0000ca3e HAC_convert_levels_to_voltages
0 0000caaa myADCB_init
0 0000cb0d SysCtl_getAuxClock
0 0000cb6e SysCtl_getClock
0 0000cbce SPI_setConfig
0 0000cc2a Device_init
0 0000cc82 ADC_setOffsetTrim
0 0000ccd6 myADCC_init
0 0000cd2a myADCD_init
0 0000cd7d GPIO_setPadConfig
0 0000cdcf IPC_readCommand
0 0000ce19 SysCtl_selectOscSourceAuxPLL
0 0000cee8 SysCtl_selectOscSource
0 0000cf2a Interrupt_initModule
0 0000cf67 GPIO_setControllerCore
0 0000cf9e GPIO_setPinConfig
0 0000cfd5 __TI_auto_init_nobinit_nopinit
0 00038000 IPC_CPU_To_CM_GetBuffer
0 00039000 IPC_CPU_To_CM_PutBuffer
0 0003a000 IPC_CPU1_To_CPU2_PutBuffer
0 0003b000 IPC_CPU1_To_CPU2_GetBuffer
abs 00000200 __TI_SYSMEM_SIZE
abs 000003f8 __TI_STACK_SIZE
abs ffffffff __TI_pprof_out_hndl
abs ffffffff __TI_prof_data_size
abs ffffffff __TI_prof_data_start
n/a UNDEFED __c_args__

[116 symbols]

Generated map file from build which HAS the section error:

******************************************************************************
TMS320C2000 Linker PC v22.6.0
******************************************************************************
>> Linked Wed Jul 19 11:43:32 2023

OUTPUT FILE NAME: <adc_ex4_soc_software_sync.out>
ENTRY POINT SYMBOL: "code_start" address: 00000000


MEMORY CONFIGURATION

name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
BEGIN 00000000 00000002 00000002 00000000 RWIX
BOOT_RSVD 00000002 000001af 00000000 000001af RWIX
RAMM0 000001b1 0000024f 00000018 00000237 RWIX
RAMM1 00000400 000003f8 000003f8 00000000 RWIX
RAMLS0 00008000 00000800 00000800 00000000 RWIX
RAMLS1 00008800 00000800 0000039e 00000462 RWIX
RAMLS2 00009000 00000800 00000000 00000800 RWIX
RAMLS3 00009800 00000800 00000000 00000800 RWIX
RAMLS4 0000a000 00000800 00000200 00000600 RWIX
RAMLS5 0000a800 00000800 000007ca 00000036 RWIX
RAMLS6 0000b000 00000800 00000000 00000800 RWIX
RAMLS7 0000b800 00000800 00000000 00000800 RWIX
RAMD0 0000c000 00000800 00000800 00000000 RWIX
RAMD1 0000c800 00000800 00000800 00000000 RWIX
RAMGS0 0000d000 00001000 00000000 00001000 RWIX
RAMGS1 0000e000 00001000 00000000 00001000 RWIX
RAMGS2 0000f000 00001000 00000000 00001000 RWIX
RAMGS3 00010000 00001000 00000000 00001000 RWIX
RAMGS4 00011000 00001000 00000000 00001000 RWIX
RAMGS5 00012000 00001000 00000000 00001000 RWIX
RAMGS6 00013000 00001000 00000000 00001000 RWIX
RAMGS7 00014000 00001000 00000000 00001000 RWIX
RAMGS8 00015000 00001000 00000000 00001000 RWIX
RAMGS9 00016000 00001000 00000000 00001000 RWIX
RAMGS10 00017000 00001000 00000000 00001000 RWIX
RAMGS11 00018000 00001000 00000000 00001000 RWIX
RAMGS12 00019000 00001000 00000000 00001000 RWIX
RAMGS13 0001a000 00001000 00000000 00001000 RWIX
RAMGS14 0001b000 00001000 00000000 00001000 RWIX
RAMGS15 0001c000 00000ff8 00000000 00000ff8 RWIX
CMTOCPURAM 00038000 00000800 00000088 00000778 RWIX
CPUTOCMRAM 00039000 00000800 000000b8 00000748 RWIX
CPU1TOCPU2RAM 0003a000 00000800 00000088 00000778 RWIX
CPU2TOCPU1RAM 0003b000 00000800 00000088 00000778 RWIX
CANA_MSG_RAM 00049000 00000800 00000000 00000800 RWIX
CANB_MSG_RAM 0004b000 00000800 00000000 00000800 RWIX
FLASH0 00080000 00002000 00000000 00002000 RWIX
FLASH1 00082000 00002000 00000000 00002000 RWIX
FLASH2 00084000 00002000 00000000 00002000 RWIX
FLASH3 00086000 00002000 00000000 00002000 RWIX
FLASH4 00088000 00008000 00000000 00008000 RWIX
FLASH5 00090000 00008000 00000000 00008000 RWIX
FLASH6 00098000 00008000 00000000 00008000 RWIX
FLASH7 000a0000 00008000 00000000 00008000 RWIX
FLASH8 000a8000 00008000 00000000 00008000 RWIX
FLASH9 000b0000 00008000 00000000 00008000 RWIX
FLASH10 000b8000 00002000 00000000 00002000 RWIX
FLASH11 000ba000 00002000 00000000 00002000 RWIX
FLASH12 000bc000 00002000 00000000 00002000 RWIX
FLASH13 000be000 00002000 00000000 00002000 RWIX
RESET 003fffc0 00000002 00000000 00000002 RWIX


SECTION ALLOCATION MAP

output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
codestart
* 0 00000000 00000002
00000000 00000002 f2838x_codestartbranch.obj (codestart)

.cinit 0 000001b8 00000014
000001b8 0000000c (.cinit..data.load) [load image, compression = lzss]
000001c4 00000004 (__TI_handler_table)
000001c8 00000004 (__TI_cinit_table)

.reset 0 003fffc0 00000000 DSECT

.stack 0 00000400 000003f8 UNINITIALIZED
00000400 000003f8 --HOLE--

.init_array
* 0 000001b1 00000000 UNINITIALIZED

.sysmem 0 0000a000 00000200 UNINITIALIZED
0000a000 00000004 rts2800_fpu64_eabi.lib : memory.c.obj (.sysmem)
0000a004 000001fc --HOLE--

.data 0 0000a800 00000018 UNINITIALIZED
0000a800 0000000e adc_ex4_soc_software_sync.obj (.data)
0000a80e 00000006 rts2800_fpu64_eabi.lib : exit.c.obj (.data)
0000a814 00000002 : _lock.c.obj (.data:_lock)
0000a816 00000002 : _lock.c.obj (.data:_unlock)

.const 0 0000a818 000007b2
0000a818 000002db adc_ex4_soc_software_sync.obj (.const:.string)
0000aaf3 00000001 --HOLE-- [fill = 0]
0000aaf4 0000010c board.obj (.const:.string)
0000ac00 00000097 driverlib.lib : gpio.obj (.const:.string)
0000ac97 00000001 --HOLE-- [fill = 0]
0000ac98 00000097 : sysctl.obj (.const:.string)
0000ad2f 00000001 --HOLE-- [fill = 0]
0000ad30 00000094 : dcc.obj (.const:.string)
0000adc4 00000094 : spi.obj (.const:.string)
0000ae58 00000088 : ipc.obj (.const:IPC_Instance)
0000aee0 00000055 device.obj (.const:.string)
0000af35 00000001 --HOLE-- [fill = 0]
0000af36 0000004a driverlib.lib : adc.obj (.const:.string)
0000af80 0000004a : ipc.obj (.const:.string)

MSGRAM_CM_TO_CPU
* 0 00038000 00000088 UNINITIALIZED
00038000 00000088 driverlib.lib : ipc.obj (MSGRAM_CM_TO_CPU)

MSGRAM_CPU_TO_CM
* 0 00039000 000000b8
00039000 00000088 driverlib.lib : ipc.obj (MSGRAM_CPU_TO_CM) [fill = 0]
00039088 00000030 adc_ex4_soc_software_sync.obj (MSGRAM_CPU_TO_CM)

MSGRAM_CPU1_TO_CPU2
* 0 0003a000 00000088 UNINITIALIZED
0003a000 00000088 driverlib.lib : ipc.obj (MSGRAM_CPU1_TO_CPU2)

MSGRAM_CPU2_TO_CPU1
* 0 0003b000 00000088 UNINITIALIZED
0003b000 00000088 driverlib.lib : ipc.obj (MSGRAM_CPU2_TO_CPU1)

.TI.ramfunc
* 0 000001b1 00000004
000001b1 00000004 driverlib.lib : sysctl.obj (.TI.ramfunc)

.text.1 0 00008000 00000800
00008000 00000037 driverlib.lib : gpio.obj (.text:GPIO_setQualificationMode)
00008037 00000037 : interrupt.obj (.text:Interrupt_enable)
0000806e 00000036 board.obj (.text:ADC_setupSOC)
000080a4 00000036 driverlib.lib : ipc.obj (.text:IPC_registerInterrupt)
000080da 00000031 : gpio.obj (.text:GPIO_setDirectionMode)
0000810b 0000002f board.obj (.text:ADC_setInterruptSource)
0000813a 0000002e board.obj (.text:ADC_setInterruptSOCTrigger)
00008168 0000002e rts2800_fpu64_eabi.lib : copy_decompress_lzss.c.obj (.text:decompress:lzss)
00008196 0000002d board.obj (.text:mySPI0_init)
000081c3 00000029 rts2800_fpu64_eabi.lib : exit.c.obj (.text)
000081ec 00000028 driverlib.lib : adc.obj (.text:ADC_setMode)
00008214 00000027 : sysctl.obj (.text:SysCtl_pollX1Counter)
0000823b 00000026 board.obj (.text:XBAR_setInputPin)
00008261 00000025 driverlib.lib : sysctl.obj (.text:SysCtl_controlCMReset)
00008286 00000024 : dcc.obj (.text:DCC_enableSingleShotMode)
000082aa 00000024 : sysctl.obj (.text:DCC_enableSingleShotMode)
000082ce 00000024 : sysctl.obj (.text:SysCtl_selectXTAL)
000082f2 00000024 adc_ex4_soc_software_sync.obj (.text:main)
00008316 00000021 device.obj (.text:Device_initGPIO)
00008337 00000020 board.obj (.text:ADC_enableInterrupt)
00008357 0000001e adc_ex4_soc_software_sync.obj (.text:ADC_readResult)
00008375 0000001e driverlib.lib : dcc.obj (.text:DCC_setCounter0ClkSource)
00008393 0000001e : sysctl.obj (.text:DCC_setCounter0ClkSource)
000083b1 0000001e : dcc.obj (.text:DCC_setCounter1ClkSource)
000083cf 0000001e : sysctl.obj (.text:DCC_setCounter1ClkSource)
000083ed 0000001e device.obj (.text:Device_verifyXTAL)
0000840b 0000001e driverlib.lib : interrupt.obj (.text:Interrupt_initVectorTable)
00008429 0000001d adc_ex4_soc_software_sync.obj (.text:ADC_getInterruptStatus)
00008446 0000001d rts2800_fpu64_eabi.lib : memcpy.c.obj (.text)
00008463 0000001c board.obj (.text:ADC_setSOCPriority)
0000847f 0000001c driverlib.lib : dcc.obj (.text:DCC_getErrorStatus)
0000849b 0000001c : dcc.obj (.text:DCC_getSingleShotStatus)
000084b7 0000001b adc_ex4_soc_software_sync.obj (.text:ADC_isBaseValid)
000084d2 0000001b board.obj (.text:ADC_isBaseValid)
000084ed 0000001b driverlib.lib : adc.obj (.text:ADC_isBaseValid)
00008508 0000001b board.obj (.text:SPI_isBaseValid)
00008523 0000001b driverlib.lib : spi.obj (.text:SPI_isBaseValid)
0000853e 0000001b board.obj (.text:XBAR_isBaseValid)
00008559 0000001a driverlib.lib : dcc.obj (.text:DCC_isBaseValid)
00008573 0000001a : sysctl.obj (.text:DCC_isBaseValid)
0000858d 0000001a board.obj (.text:SPI_setEmulationMode)
000085a7 0000001a board.obj (.text:SPI_setPTESignalPolarity)
000085c1 0000001a driverlib.lib : sysctl.obj (.text:SysCtl_getLowSpeedClock)
000085db 0000001a : sysctl.obj (.text:SysCtl_selectXTALSingleEnded)
000085f5 00000019 board.obj (.text:GPIO_init)
0000860e 00000019 device.obj (.text:IPC_setBootMode)
00008627 00000019 board.obj (.text:U_RESET_init)
00008640 00000019 board.obj (.text:myGPIO10AdcTrig_init)
00008659 00000019 board.obj (.text:myGPIO11SpiCs_init)
00008672 00000019 rts2800_fpu64_eabi.lib : boot28.asm.obj (.text)
0000868b 00000018 board.obj (.text:SPI_disableFIFO)
000086a3 00000017 device.obj (.text:SysCtl_enablePeripheral)
000086ba 00000017 driverlib.lib : sysctl.obj (.text:SysCtl_enablePeripheral)
000086d1 00000016 board.obj (.text:ADC_setInterruptPulseMode)
000086e7 00000016 board.obj (.text:ADC_setPrescaler)
000086fd 00000016 driverlib.lib : dcc.obj (.text:DCC_disableDoneSignal)
00008713 00000016 : sysctl.obj (.text:DCC_disableDoneSignal)
00008729 00000016 : dcc.obj (.text:DCC_enableDoneSignal)
0000873f 00000016 device.obj (.text:Device_bootCM)
00008755 00000015 board.obj (.text:ADC_disableBurstMode)
0000876a 00000015 driverlib.lib : dcc.obj (.text:DCC_clearDoneFlag)
0000877f 00000015 : sysctl.obj (.text:DCC_clearDoneFlag)
00008794 00000015 : dcc.obj (.text:DCC_clearErrorFlag)
000087a9 00000015 : sysctl.obj (.text:DCC_clearErrorFlag)
000087be 00000015 : dcc.obj (.text:DCC_disableErrorSignal)
000087d3 00000015 : sysctl.obj (.text:DCC_disableErrorSignal)
000087e8 00000015 device.obj (.text:GPIO_unlockPortConfig)
000087fd 00000003 board.obj (.text:INPUTXBAR_init)

.text.2 0 00008800 0000039e
00008800 00000014 adc_ex4_soc_software_sync.obj (.text:ADC_clearInterruptStatus)
00008814 00000014 board.obj (.text:ADC_clearInterruptStatus)
00008828 00000014 board.obj (.text:CH_FAULT2_init)
0000883c 00000014 board.obj (.text:CH_FAULT3_init)
00008850 00000014 board.obj (.text:CH_FAULT4_init)
00008864 00000014 board.obj (.text:CH_FAULT5_init)
00008878 00000014 board.obj (.text:CH_FAULT6_init)
0000888c 00000014 board.obj (.text:CH_FAULT7_init)
000088a0 00000014 board.obj (.text:CH_FAULT8_init)
000088b4 00000014 driverlib.lib : dcc.obj (.text:DCC_disableModule)
000088c8 00000014 : sysctl.obj (.text:DCC_disableModule)
000088dc 00000014 : dcc.obj (.text:DCC_enableErrorSignal)
000088f0 00000014 : dcc.obj (.text:DCC_enableModule)
00008904 00000014 : sysctl.obj (.text:DCC_enableModule)
00008918 00000014 adc_ex4_soc_software_sync.obj (.text:IPC_waitForAck)
0000892c 00000014 board.obj (.text:RELAY_EN_init)
00008940 00000014 device.obj (.text:SysCtl_deviceCal)
00008954 00000014 adc_ex4_soc_software_sync.obj (.text:SysCtl_setEnetClk)
00008968 00000013 board.obj (.text:ADC_enableConverter)
0000897b 00000013 board.obj (.text:CH_FAULT1_init)
0000898e 00000013 device.obj (.text:Device_enableUnbondedGPIOPullupsFor176Pin)
000089a1 00000013 adc_ex4_soc_software_sync.obj (.text:IPC_sync)
000089b4 00000012 adc_ex4_soc_software_sync.obj (.text:IPC_waitForFlag)
000089c6 00000012 adc_ex4_soc_software_sync.obj (.text:performReset)
000089d8 00000012 adc_ex4_soc_software_sync.obj (.text:setup_IPC)
000089ea 00000011 device.obj (.text:Device_enableUnbondedGPIOPullups)
000089fb 00000011 board.obj (.text:SPI_disableModule)
00008a0c 00000011 board.obj (.text:SPI_enableLoopback)
00008a1d 00000011 board.obj (.text:SPI_enableModule)
00008a2e 00000011 device.obj (.text:SysCtl_setCMClk)
00008a3f 00000011 adc_ex4_soc_software_sync.obj (.text:setup_MCU)
00008a50 0000000f adc_ex4_soc_software_sync.obj (.text:IPC_ackFlagRtoL)
00008a5f 0000000f adc_ex4_soc_software_sync.obj (.text:IPC_clearFlagLtoR)
00008a6e 0000000f adc_ex4_soc_software_sync.obj (.text:IPC_sendResponse)
00008a7d 0000000f adc_ex4_soc_software_sync.obj (.text:IPC_setFlagLtoR)
00008a8c 0000000f device.obj (.text:IPC_setFlagLtoR)
00008a9b 0000000f driverlib.lib : ipc.obj (.text:Interrupt_register)
00008aaa 0000000e adc_ex4_soc_software_sync.obj (.text:GPIO_isPinValid)
00008ab8 0000000e board.obj (.text:GPIO_isPinValid)
00008ac6 0000000e driverlib.lib : gpio.obj (.text:GPIO_isPinValid)
00008ad4 0000000e : interrupt.obj (.text:Interrupt_defaultHandler)
00008ae2 0000000d board.obj (.text:Board_init)
00008aef 0000000d driverlib.lib : interrupt.obj (.text:Interrupt_disableGlobal)
00008afc 0000000d : interrupt.obj (.text:Interrupt_enableGlobal)
00008b09 0000000d device.obj (.text:SysCtl_setLowSpeedClock)
00008b16 0000000c driverlib.lib : sysctl.obj (.text:SysCtl_setPLLSysClk)
00008b22 0000000c rts2800_fpu64_eabi.lib : args_main.c.obj (.text)
00008b2e 0000000b device.obj (.text:SysCtl_isCMReset)
00008b39 0000000b driverlib.lib : sysctl.obj (.text:SysCtl_isCMReset)
00008b44 0000000b : sysctl.obj (.text:SysCtl_isMCDClockFailureDetected)
00008b4f 00000009 board.obj (.text:ADC_init)
00008b58 00000009 rts2800_fpu64_eabi.lib : _lock.c.obj (.text)
00008b61 00000008 device.obj (.text:SysCtl_disableWatchdog)
00008b69 00000008 rts2800_fpu64_eabi.lib : copy_decompress_none.c.obj (.text:decompress:none)
00008b71 00000008 f2838x_codestartbranch.obj (.text)
00008b79 00000007 driverlib.lib : sysctl.obj (.text:SysCtl_resetMCD)
00008b80 00000007 device.obj (.text:__error__)
00008b87 00000007 board.obj (.text:myINPUTXBARINPUT10_init)
00008b8e 00000006 adc_ex4_soc_software_sync.obj (.text:Interrupt_clearACKGroup)
00008b94 00000003 board.obj (.text:SPI_init)
00008b97 00000002 driverlib.lib : interrupt.obj (.text:Interrupt_illegalOperationHandler)
00008b99 00000002 : interrupt.obj (.text:Interrupt_nmiHandler)
00008b9b 00000002 rts2800_fpu64_eabi.lib : pre_init.c.obj (.text)
00008b9d 00000001 : startup.c.obj (.text)

.text.3 0 0000c000 00000800
0000c000 00000167 device.obj (.text:Device_enableAllPeripherals)
0000c167 00000132 driverlib.lib : sysctl.obj (.text:SysCtl_setClock)
0000c299 00000118 : sysctl.obj (.text:SysCtl_isPLLValid)
0000c3b1 00000113 : sysctl.obj (.text:SysCtl_setAuxClock)
0000c4c4 000000cb : dcc.obj (.text:DCC_verifyClockFrequency)
0000c58f 000000a0 adc_ex4_soc_software_sync.obj (.text:reportFaultsAndChannelData)
0000c62f 00000098 board.obj (.text:myADCA_init)
0000c6c7 00000090 adc_ex4_soc_software_sync.obj (.text:IPC_RCV_HWASCMD)
0000c757 00000088 rts2800_fpu64_eabi.lib : fs_div28.asm.obj (.text)
0000c7df 00000021 board.obj (.text:ADC_disableContinuousMode)

.text.4 0 0000c800 00000800
0000c800 00000077 adc_ex4_soc_software_sync.obj (.text:setup_ENET_MII)
0000c877 00000075 board.obj (.text:PinMux_init)
0000c8ec 00000073 driverlib.lib : dcc.obj (.text:DCC_setCounterSeeds)
0000c95f 00000073 : sysctl.obj (.text:DCC_setCounterSeeds)
0000c9d2 0000006c : adc.obj (.text:ADC_setINLTrim)
0000ca3e 0000006c hwas_adc_conversions.obj (.text:HAC_convert_levels_to_voltages)
0000caaa 00000063 board.obj (.text:myADCB_init)
0000cb0d 00000061 driverlib.lib : sysctl.obj (.text:SysCtl_getAuxClock)
0000cb6e 00000060 : sysctl.obj (.text:SysCtl_getClock)
0000cbce 0000005c : spi.obj (.text:SPI_setConfig)
0000cc2a 00000058 device.obj (.text:Device_init)
0000cc82 00000054 driverlib.lib : adc.obj (.text:ADC_setOffsetTrim)
0000ccd6 00000054 board.obj (.text:myADCC_init)
0000cd2a 00000053 board.obj (.text:myADCD_init)
0000cd7d 00000052 driverlib.lib : gpio.obj (.text:GPIO_setPadConfig)
0000cdcf 0000004a : ipc.obj (.text:IPC_readCommand)
0000ce19 00000047 : sysctl.obj (.text:SysCtl_selectOscSourceAuxPLL)
0000ce60 00000044 adc_ex4_soc_software_sync.obj (.text:GPIO_writePin)
0000cea4 00000044 board.obj (.text:GPIO_writePin)
0000cee8 00000042 driverlib.lib : sysctl.obj (.text:SysCtl_selectOscSource)
0000cf2a 0000003d : interrupt.obj (.text:Interrupt_initModule)
0000cf67 00000037 : gpio.obj (.text:GPIO_setControllerCore)
0000cf9e 00000037 : gpio.obj (.text:GPIO_setPinConfig)
0000cfd5 0000002b rts2800_fpu64_eabi.lib : autoinit.c.obj (.text:__TI_auto_init_nobinit_nopinit)

MODULE SUMMARY

Module code ro data rw data
------ ---- ------- -------
.\
adc_ex4_soc_software_sync.obj 843 731 62
hwas_adc_conversions.obj 108 0 0
+--+-------------------------------+------+---------+---------+
Total: 951 731 62

.\device\
device.obj 728 85 0
f2838x_codestartbranch.obj 10 0 0
+--+-------------------------------+------+---------+---------+
Total: 738 85 0

.\syscfg\
board.obj 1566 268 0
+--+-------------------------------+------+---------+---------+
Total: 1566 268 0

C:/ti/c2000/C2000Ware_4_03_00_00/driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib
sysctl.obj 1785 151 0
ipc.obj 143 210 544
dcc.obj 663 148 0
gpio.obj 310 151 0
adc.obj 259 74 0
spi.obj 119 148 0
interrupt.obj 190 0 0
+--+-------------------------------+------+---------+---------+
Total: 3469 882 544

C:\ti\ccs1210\ccs\tools\compiler\ti-cgt-c2000_22.6.0.LTS\lib\rts2800_fpu64_eabi.lib
fs_div28.asm.obj 136 0 0
exit.c.obj 41 0 6
copy_decompress_lzss.c.obj 46 0 0
autoinit.c.obj 43 0 0
memcpy.c.obj 29 0 0
boot28.asm.obj 25 0 0
_lock.c.obj 9 0 4
args_main.c.obj 12 0 0
copy_decompress_none.c.obj 8 0 0
pre_init.c.obj 2 0 0
startup.c.obj 1 0 0
+--+-------------------------------+------+---------+---------+
Total: 352 0 10

Heap: 0 0 512
Stack: 0 0 1016
Linker Generated: 0 20 0
+--+-------------------------------+------+---------+---------+
Grand Total: 7076 1986 2144


LINKER GENERATED COPY TABLES

__TI_cinit_table @ 000001c8 records: 1, size/record: 4, table size: 4
.data: load addr=000001b8, load size=0000000c bytes, run addr=0000a800, run size=00000018 bytes, compression=lzss


LINKER GENERATED HANDLER TABLE

__TI_handler_table @ 000001c4 records: 2, size/record: 2, table size: 4
index: 0, handler: __TI_decompress_lzss
index: 1, handler: __TI_decompress_none


GLOBAL DATA SYMBOLS: SORTED BY DATA PAGE

address data page name
-------- ---------------- ----
00000400 10 (00000400) __stack

0000a000 280 (0000a000) _sys_memory

0000a800 2a0 (0000a800) DEBUG_PASS
0000a801 2a0 (0000a800) gRunMode
0000a802 2a0 (0000a800) gOpcode
0000a803 2a0 (0000a800) gUpdateChannel
0000a804 2a0 (0000a800) processCmd
0000a806 2a0 (0000a800) gUpdateRefV_uv
0000a808 2a0 (0000a800) isrCount
0000a80a 2a0 (0000a800) base
0000a80c 2a0 (0000a800) DEBUG_COUNTER_IPC_RCV
0000a80e 2a0 (0000a800) __TI_enable_exit_profile_output
0000a810 2a0 (0000a800) __TI_cleanup_ptr
0000a812 2a0 (0000a800) __TI_dtors_ptr
0000a814 2a0 (0000a800) _lock
0000a816 2a0 (0000a800) _unlock

0000ae58 2b9 (0000ae40) IPC_Instance

00038000 e00 (00038000) IPC_CPU_To_CM_GetBuffer

00039000 e40 (00039000) IPC_CPU_To_CM_PutBuffer

00039088 e42 (00039080) allChannelsReport

0003a000 e80 (0003a000) IPC_CPU1_To_CPU2_PutBuffer

0003b000 ec0 (0003b000) IPC_CPU1_To_CPU2_GetBuffer


GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name

page address name
---- ------- ----
0 00008b4f ADC_init
0 0000c9d2 ADC_setINLTrim
0 000081ec ADC_setMode
0 0000cc82 ADC_setOffsetTrim
0 00008ae2 Board_init
0 000081c3 C$$EXIT
0 0000897b CH_FAULT1_init
0 00008828 CH_FAULT2_init
0 0000883c CH_FAULT3_init
0 00008850 CH_FAULT4_init
0 00008864 CH_FAULT5_init
0 00008878 CH_FAULT6_init
0 0000888c CH_FAULT7_init
0 000088a0 CH_FAULT8_init
0 0000c4c4 DCC_verifyClockFrequency
0 0000a80c DEBUG_COUNTER_IPC_RCV
0 0000a800 DEBUG_PASS
0 0000873f Device_bootCM
0 0000c000 Device_enableAllPeripherals
0 000089ea Device_enableUnbondedGPIOPullups
0 0000898e Device_enableUnbondedGPIOPullupsFor176Pin
0 0000cc2a Device_init
0 00008316 Device_initGPIO
0 000083ed Device_verifyXTAL
0 000085f5 GPIO_init
0 0000cf67 GPIO_setControllerCore
0 000080da GPIO_setDirectionMode
0 0000cd7d GPIO_setPadConfig
0 0000cf9e GPIO_setPinConfig
0 00008000 GPIO_setQualificationMode
0 0000ca3e HAC_convert_levels_to_voltages
0 000087fd INPUTXBAR_init
0 0003b000 IPC_CPU1_To_CPU2_GetBuffer
0 0003a000 IPC_CPU1_To_CPU2_PutBuffer
0 00038000 IPC_CPU_To_CM_GetBuffer
0 00039000 IPC_CPU_To_CM_PutBuffer
0 0000ae58 IPC_Instance
0 0000c6c7 IPC_RCV_HWASCMD
0 0000cdcf IPC_readCommand
0 000080a4 IPC_registerInterrupt
0 00008037 Interrupt_enable
0 0000cf2a Interrupt_initModule
0 0000840b Interrupt_initVectorTable
0 0000c877 PinMux_init
0 0000892c RELAY_EN_init
0 00008b94 SPI_init
0 0000cbce SPI_setConfig
0 00008261 SysCtl_controlCMReset
0 000001b1 SysCtl_delay
0 0000cb0d SysCtl_getAuxClock
0 0000cb6e SysCtl_getClock
0 000085c1 SysCtl_getLowSpeedClock
0 0000c299 SysCtl_isPLLValid
0 0000cee8 SysCtl_selectOscSource
0 0000ce19 SysCtl_selectOscSourceAuxPLL
0 000082ce SysCtl_selectXTAL
0 000085db SysCtl_selectXTALSingleEnded
0 0000c3b1 SysCtl_setAuxClock
0 0000c167 SysCtl_setClock
0 00008627 U_RESET_init
0 000001c8 __TI_CINIT_Base
0 000001cc __TI_CINIT_Limit
0 000001cc __TI_CINIT_Warm
0 000001c4 __TI_Handler_Table_Base
0 000001c8 __TI_Handler_Table_Limit
0 000007f8 __TI_STACK_END
abs 000003f8 __TI_STACK_SIZE
abs 00000200 __TI_SYSMEM_SIZE
0 0000cfd5 __TI_auto_init_nobinit_nopinit
0 0000a810 __TI_cleanup_ptr
0 00008168 __TI_decompress_lzss
0 00008b69 __TI_decompress_none
0 0000a812 __TI_dtors_ptr
0 0000a80e __TI_enable_exit_profile_output
abs ffffffff __TI_pprof_out_hndl
abs ffffffff __TI_prof_data_size
abs ffffffff __TI_prof_data_start
0 0000c757 __c28xabi_divf
n/a UNDEFED __c_args__
0 00008b80 __error__
0 00000400 __stack
0 00008b22 _args_main
0 00008672 _c_int00
0 0000a814 _lock
0 00008b60 _nop
0 00008b5c _register_lock
0 00008b58 _register_unlock
0 0000a000 _sys_memory
0 00008b9d _system_post_cinit
0 00008b9b _system_pre_init
0 0000a816 _unlock
0 000081c3 abort
0 00039088 allChannelsReport
0 0000a80a base
0 00000000 code_start
0 000081c5 exit
0 0000a802 gOpcode
0 0000a801 gRunMode
0 0000a803 gUpdateChannel
0 0000a806 gUpdateRefV_uv
0 0000a808 isrCount
0 000082f2 main
0 00008446 memcpy
0 0000c62f myADCA_init
0 0000caaa myADCB_init
0 0000ccd6 myADCC_init
0 0000cd2a myADCD_init
0 00008640 myGPIO10AdcTrig_init
0 00008659 myGPIO11SpiCs_init
0 00008b87 myINPUTXBARINPUT10_init
0 00008196 mySPI0_init
0 000089c6 performReset
0 0000a804 processCmd
0 0000c58f reportFaultsAndChannelData
0 0000c800 setup_ENET_MII
0 000089d8 setup_IPC
0 00008a3f setup_MCU


GLOBAL SYMBOLS: SORTED BY Symbol Address

page address name
---- ------- ----
0 00000000 code_start
0 000001b1 SysCtl_delay
0 000001c4 __TI_Handler_Table_Base
0 000001c8 __TI_CINIT_Base
0 000001c8 __TI_Handler_Table_Limit
0 000001cc __TI_CINIT_Limit
0 000001cc __TI_CINIT_Warm
0 00000400 __stack
0 000007f8 __TI_STACK_END
0 00008000 GPIO_setQualificationMode
0 00008037 Interrupt_enable
0 000080a4 IPC_registerInterrupt
0 000080da GPIO_setDirectionMode
0 00008168 __TI_decompress_lzss
0 00008196 mySPI0_init
0 000081c3 C$$EXIT
0 000081c3 abort
0 000081c5 exit
0 000081ec ADC_setMode
0 00008261 SysCtl_controlCMReset
0 000082ce SysCtl_selectXTAL
0 000082f2 main
0 00008316 Device_initGPIO
0 000083ed Device_verifyXTAL
0 0000840b Interrupt_initVectorTable
0 00008446 memcpy
0 000085c1 SysCtl_getLowSpeedClock
0 000085db SysCtl_selectXTALSingleEnded
0 000085f5 GPIO_init
0 00008627 U_RESET_init
0 00008640 myGPIO10AdcTrig_init
0 00008659 myGPIO11SpiCs_init
0 00008672 _c_int00
0 0000873f Device_bootCM
0 000087fd INPUTXBAR_init
0 00008828 CH_FAULT2_init
0 0000883c CH_FAULT3_init
0 00008850 CH_FAULT4_init
0 00008864 CH_FAULT5_init
0 00008878 CH_FAULT6_init
0 0000888c CH_FAULT7_init
0 000088a0 CH_FAULT8_init
0 0000892c RELAY_EN_init
0 0000897b CH_FAULT1_init
0 0000898e Device_enableUnbondedGPIOPullupsFor176Pin
0 000089c6 performReset
0 000089d8 setup_IPC
0 000089ea Device_enableUnbondedGPIOPullups
0 00008a3f setup_MCU
0 00008ae2 Board_init
0 00008b22 _args_main
0 00008b4f ADC_init
0 00008b58 _register_unlock
0 00008b5c _register_lock
0 00008b60 _nop
0 00008b69 __TI_decompress_none
0 00008b80 __error__
0 00008b87 myINPUTXBARINPUT10_init
0 00008b94 SPI_init
0 00008b9b _system_pre_init
0 00008b9d _system_post_cinit
0 0000a000 _sys_memory
0 0000a800 DEBUG_PASS
0 0000a801 gRunMode
0 0000a802 gOpcode
0 0000a803 gUpdateChannel
0 0000a804 processCmd
0 0000a806 gUpdateRefV_uv
0 0000a808 isrCount
0 0000a80a base
0 0000a80c DEBUG_COUNTER_IPC_RCV
0 0000a80e __TI_enable_exit_profile_output
0 0000a810 __TI_cleanup_ptr
0 0000a812 __TI_dtors_ptr
0 0000a814 _lock
0 0000a816 _unlock
0 0000ae58 IPC_Instance
0 0000c000 Device_enableAllPeripherals
0 0000c167 SysCtl_setClock
0 0000c299 SysCtl_isPLLValid
0 0000c3b1 SysCtl_setAuxClock
0 0000c4c4 DCC_verifyClockFrequency
0 0000c58f reportFaultsAndChannelData
0 0000c62f myADCA_init
0 0000c6c7 IPC_RCV_HWASCMD
0 0000c757 __c28xabi_divf
0 0000c800 setup_ENET_MII
0 0000c877 PinMux_init
0 0000c9d2 ADC_setINLTrim
0 0000ca3e HAC_convert_levels_to_voltages
0 0000caaa myADCB_init
0 0000cb0d SysCtl_getAuxClock
0 0000cb6e SysCtl_getClock
0 0000cbce SPI_setConfig
0 0000cc2a Device_init
0 0000cc82 ADC_setOffsetTrim
0 0000ccd6 myADCC_init
0 0000cd2a myADCD_init
0 0000cd7d GPIO_setPadConfig
0 0000cdcf IPC_readCommand
0 0000ce19 SysCtl_selectOscSourceAuxPLL
0 0000cee8 SysCtl_selectOscSource
0 0000cf2a Interrupt_initModule
0 0000cf67 GPIO_setControllerCore
0 0000cf9e GPIO_setPinConfig
0 0000cfd5 __TI_auto_init_nobinit_nopinit
0 00038000 IPC_CPU_To_CM_GetBuffer
0 00039000 IPC_CPU_To_CM_PutBuffer
0 00039088 allChannelsReport
0 0003a000 IPC_CPU1_To_CPU2_PutBuffer
0 0003b000 IPC_CPU1_To_CPU2_GetBuffer
abs 00000200 __TI_SYSMEM_SIZE
abs 000003f8 __TI_STACK_SIZE
abs ffffffff __TI_pprof_out_hndl
abs ffffffff __TI_prof_data_size
abs ffffffff __TI_prof_data_start
n/a UNDEFED __c_args__

[117 symbols]

  • 0
    TI__Mastermind 32015 points

    Hi,

    Apologies for the late response.

    If you have F2838D device (controlcard maybe?) with you, could you try the same .out on that device?

    Regards,

    Veena

  • 0 in reply to Veena Kamath
    Prodigy 45 points

    Veena,

    These are the two development boards, they are connected to the PC by a TI XDS110:

    https://www.ti.com/tool/TMDSHSECDOCK

    https://www.ti.com/tool/TMDSCNCD28388D

     

  • 0 in reply to James Thomas
    TI__Mastermind 32015 points

    Yes, Could you try it on the F28388D controlcard. In the thread title you mentioned F28386S, hence I assumed you were using a custom board. And I just wanted to check if it is a F28386S specific issue. 

    Regards,

    Veena

  • 0 in reply to Veena Kamath
    Prodigy 45 points

    I'm sorry about the confusion. I'll edit the start of my post to make it more clear. We will soon have a custom board using the F28386S MCU, but I have not yet tried any software on it.  I am still working with the TI dev kit using the TMDSCNCD28388D.  This problem I am seeing occurs on TI hardware. I don't yet know if it will also occur on our custom hardware.

  • 0 in reply to Veena Kamath
    Prodigy 45 points

    Yes - this has been tried only on the F2838D controlcard, with the results I posted.  I have not yet attempted it on any custom hardware.

  • 0 in reply to James Thomas
    TI__Mastermind 32015 points

    Let me try it on my controlcard and get back to you

    Regards,

    Veena

  • 0 in reply to Veena Kamath
    Prodigy 45 points

    Thank you. I'll attach my own project. The unmodified example CPU1 program adc_ex4_soc_software_sync" does not present the message about the section.  Only my modified version does so, therefore you will need this.

  • 0 in reply to James Thomas
    Prodigy 45 points

    I tried to attach a ZIP of my project by editing the original post. It seemed to upload it. I clicked POST to submit the change, but I don't see the attachment appearing here.  Strange.

  • 0 in reply to Veena Kamath
    Prodigy 45 points

    I uploaded my modified example project to this post successfully. Since my initial post, I have modified it to map only a 32-bit integer to "MSGRAM_CPU_TO_CM" data section (rather than the array I had been using), but this does not prevent the Loader message from appearing - I still get the message. I had postulated that perhaps my data structure was too large for the link map (?) or the section, but that does not seem to be the cause of the Loader presenting that message at load time.

  • 0 in reply to Veena Kamath
    Prodigy 45 points

    Veena, were you able to attempt it?  Have you seen my latest replies below?  I also attached my code.

  • 0 in reply to James Thomas
    TI__Expert 5871 points

    Hi James,

    The header files - hwas_opcode.h, hwas_runmode.h, hwas_channel_reports.h and hwas_IPC.h seems to be missing in the attached zip file.

    Can you have a look at them?

    Thanks

    Aswin

  • 0 in reply to Aswin P
    Prodigy 45 points

    missing_headers.zip

    I added the missing headers to this post reply.  I examined them, but I don't see that they contain anything that could cause the message to appear.  Do you?

  • 0 in reply to James Thomas
    TI__Expert 5871 points

    Hi James,

    I was getting these errors when i try to build the project that is attached to the post.

    But with those headers, i am able to build the project.

    Let me test this .out, will get back to you shortly.

    Thanks

    Aswin 

  • 0 in reply to Aswin P
    TI__Expert 5871 points

    Hi James,

    I was looking into the linker command files and it looked fine.

    I made a small change in the code by removing the default value of writing 0 to debugOnly variable in the adc_ex4_soc_software_sync example.

    Updated code - 
    #pragma DATA_SECTION(debugOnly, "MSGRAM_CPU_TO_CM")
    volatile uint32_t debugOnly; // remove after debug

    Can you try from your side and see if you are still facing the "C28xx_CPU1: Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map." issue?

    Thanks

    Aswin

  • 0 in reply to Aswin P
    Prodigy 45 points

    Aswin, Yes - removing the assignment to that 'debugOnly' variable prevents the message from appearing, but that does not resolve the problem... I have already tried that on my side. The loader seems to be alerting us that writing to any variable (or even my original array, as commented-out) in that section is not allowed.  That is the very problem I am trying to understand, because I need to map data into that section for IPC.

    Earlier in my post (Aug 1) I wrote this to describe why I tried to see if the problem would disappear if I were to create and store a 32-bit integer ("debugOnly") as a substitute for storing my array:

    "I uploaded my modified example project to this post successfully. Since my initial post, I have modified it to map only a 32-bit integer to "MSGRAM_CPU_TO_CM" data section (rather than the array I had been using), but this does not prevent the Loader message from appearing - I still get the message. I had postulated that perhaps my data structure was too large for the link map (?) or the section, but that does not seem to be the cause of the Loader presenting that message at load time."

    SO - the "debugOnly" object exists merely to test whether my array (the original object, which I still need to use) was somehow too large and causing the message to appear. Using a small object like "debugOnly" was merely a "shot in the dark" to try to prevent the message and give a clue as to the cause. But as mentioned above, that was fruitless at the time. I concluded from this that the size of the data I am mapping is not the cause.  In my application, I really do need to map that array instead of the "debugOnly" 32-bit integer.  But use of either the array or the 32-bit variable causes the loader to produce that warning. It seems to be indicating that something rather serious is wrong with the data section mapping.  That has me worried, and is the reason for this post.

    So to reverse my "shot in the dark" approach, you would do the following:

    1. Uncomment the #pragma and the declaration of reportAll_t allChannelsReport[] on lines 136-137.

    2. Comment out lines 133 and 134.

    3. Uncomment lines 554 - 611 (assignments to allChannelsReport[] and IPC calls).

    However, that is probably unnecessary for now, because even the debugOnly 32-bit integer use is causing the same issue, so I don't think use of the array (my actual requirement) or its size is causing the error.

  • 0 in reply to James Thomas
    TI__Expert 5871 points

    Hi James

    I did some experiments to understand the issue.

    The issue arise when we initialize the struct to zero before main. When i removed the init part, the message "C28xx_CPU1: Loader: One or more sections of your program falls into a memory region that is not writable", was not reflecting in the console. Probably the cinit section is having the issue. i am trying to understand further on this. 

    Since the compiler flag is EABI, it automatically initialize the variables to zero.

    I have uncommented the code that you mentioned in the previous reply and did the following changes in the init part - 

    #pragma DATA_SECTION(debugOnly, "MSGRAM_CPU_TO_CM")
    volatile uint32_t debugOnly; // remove after debug

    #pragma DATA_SECTION(allChannelsReport, "MSGRAM_CPU_TO_CM")
    reportAll_t allChannelsReport;

    Please try from your side and let me know if you are facing the issue again. I will gather more info on the initialization part.

    Thanks

    Aswin 

  • 0 in reply to Aswin P
    TI__Expert 5871 points

    Hi James,

    This is identified as a GEL issue and we have created a JIRA to track this. The upcoming CCS Version should include the updated GEL file.

    Please replace the attached GEL file in the ccs1240\ccs\ccs_base\emulation\gel\f28388d_cpu1.gel

    f28388d_cpu1.gel

    Thanks

    Aswin 

  • 0 in reply to Aswin P
    Prodigy 45 points

    The GEL file prevents the message from being issued.  Thank you!