The user guide says that I have to run the cm_common_config_c28x example on the CPU1 core. But in this file no support for the CM SSI setup is present, it seems. For me it is unclear what pins to use.
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The user guide says that I have to run the cm_common_config_c28x example on the CPU1 core. But in this file no support for the CM SSI setup is present, it seems. For me it is unclear what pins to use.
I believe that since this example uses internal loopback, the SSI pins are not configured. You can add your own code to configure the GPIO pins as SSI pins and also modify the example code to disable internal loopback.