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TMS320F28374S: About addition and subtraction counting direction settings after PWM phase shift synchronization

Part Number: TMS320F28374S

Hi Team,

There's an issue from the customer need your help:

I would like to ask about the increase and decrease counting problem after phase shift synchronization between EPWM modules.

Regarding this problem, the chip manual is very clear: for the increase and decrease counting mode of PWM, whether the synchronized counter increases or decreases the count is determined by TBCTL->PHSDIR, 0 means subtract count, and vice versa.

The problem now is that I want to use the EPWM7's counter zero crossing to generate a synchronization signal to trigger the phase shift operation of EPWM8, so I configure EPWM8 as follows:

EPWM_setTimeBasePeriod(EPWM8_BASE, 500);
EPWM_setTimeBaseCounter(EPWM8_BASE, 0);
EPWM_setTimeBaseCounterMode(EPWM8_BASE, EPWM_COUNTER_MODE_UP_DOWN);

EPWM_enablePhaseShiftLoad(EPWM8_BASE);
EPWM_setPhaseShift(EPWM8_BASE, 300);
EPWM_setCountModeAfterSync(EPWM8_BASE,EPWM_COUNT_MODE_UP_AFTER_SYNC);
EPWM_setSyncOutPulseMode(EPWM8_BASE, EPWM_SYNC_OUT_PULSE_ON_EPWMxSYNCIN);

The above configuration should be relatively simple and clear. However, when testing, read the data of EPWM8's cycle register and count register, as follows:

As you can see, the period register data is 500, as configured

But the data in the counting register reaches 870, which exceeds the data in the periodic register, why? And in this case, the output of EPWM8 is always low

However, if the setting of increasing or decreasing the count is removed, or modified to decrement count EPWM_setCountModeAfterSync(EPWM8_BASE, EPWM_COUNT_MODE_DOWN_AFTER_SYNC), the counter data is normal again, and the PWM output is also normal

I would like to ask what causes this?

Thanks & Regards,

Ben

  • Hi Ben,

    Are you updating your TBCTR at all during run time operation? Are you updating your TBPHS with a formula during run time? 

    One theory we have is that your PWM, when the SYNC event occurs, could be setting TBPHS to a value greater than your TBPRD.

    Best,

    Ryan Ma

  • Hi Ryan,

    Thanks Reply!

    After the value of TBPHS is set, it will not be modified again. The value of TBCTR will be reloaded by TBPHS. In other cases, the value of TBCTR will not be dynamically modified.

    I will carefully check whether it will be interfered by other modules. The configuration of EPWM8 will not cause TBPHS to be set to a value greater than TBPRD, but other modules may have problems in this regard, which needs to be checked.

    I would like to ask, if TBPHS is set to a value greater than TBPRD, will there be any abnormality?

    In addition, in the up-down counting mode, the period register is set to 500. If I want to set TBPHS to 500, will it affect whether the counting direction after synchronization is set to up-counting or down-counting?

    Furthermore, if I set TBPHS to exceed the data of the period register, and the counting direction after synchronization is increment, what will happen?

    The situation when the comparison register exceeds the period register is given in the chip manual, but the situation that the count register exceeds the period register is not given.

    Best Regards,

    Ben

  • Hi Ben,

    Yes if TBPHS is set to a value greater than TBPRD the TBCTR will never reach TBPRD. The sync event will cause the TBCTR to set to whatever value you chose. Then the TBCTR will start incrementing.

    In addition, in the up-down counting mode, the period register is set to 500. If I want to set TBPHS to 500, will it affect whether the counting direction after synchronization is set to up-counting or down-counting

    This is handled within the TBCTL[PHSDIR] which will indicate the direction the TBCTR will count after synchronization. This will actually not affect whether the counting direction after sync is set to up or down counting.

    Furthermore, if I set TBPHS to exceed the data of the period register, and the counting direction after synchronization is increment, what will happen?

    The TBCTR will increment until a sync event occurs to set it back to TBPHS value.

    Best,

    Ryan Ma