Part Number: TMS320F28384D
In the TRM :TMS320F2838x Real-Time Microcontrollers With Connectivity Manager TRM (Rev. D)
page number 2832, there is a OR gate with entry HRFRC[CALIBDONE] which feeds the set of LATCH, and HRFRC[CALIBDONE] also feeds the clear of LATCH, is it a OR gate or XOR gate .
the gate neither looks exactly like the OR gate nor as XOR gate, can I get the clarification, please?
