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TMS320F28374S: DINT in nested interrupts

Part Number: TMS320F28374S


Hello,

According to https://software-dl.ti.com/C2000/docs/c28x_interrupt_nesting/html/index.html the structure of a nested interrupts is as following:

void EPWM1_TZINT_ISR(void)
{
        uint16_t TempPIEIER;
        TempPIEIER = PieCtrlRegs.PIEIER2.all; // Save PIEIER register for later
        IER |= 0x002;                         // Set global priority by adjusting IER
        IER &= 0x002;
        PieCtrlRegs.PIEIER2.all &= 0x0002;    // Set group priority by adjusting PIEIER2 to allow INT2.2 to interrupt current ISR
        PieCtrlRegs.PIEACK.all = 0xFFFF;      // Enable PIE interrupts
        asm("       NOP");                    // Wait one cycle
        EINT;                                 // Clear INTM to enable interrupts
        //
        // Insert ISR Code here.......
        // for now just insert a delay
        //
        for(i = 1; i <= 10; i++) {}
        //
        // Restore registers saved:
        //
        DINT;
        PieCtrlRegs.PIEIER2.all = TempPIEIER;
}

Assume, I do not want to change the group-priority at the end of the ISR, is the "DINT" still mandetory?
So is the DINT necessary only to protect the writes of important registers within the isr sourc code like PIEIER, PIEACK, etc...
or is it always required in order to protect the last three automatic software steps when
an ISR is finished:
1. Manual context restore (if needed)
2. Execute the NASP instruction
3. Execute IRET instruction


Best regards
wilson
  • Hi,
    The DINT is indeed needed (this is for example mentioned in the errata), but newer versions of the compiler take care of this and disables interrupts automatically when exiting nested interrupt. You can check the assembly to be sure (you will see "SETC      INTM, DBGM"  few instructions before IRET).
    I don't remember exactly which compiler version was the first with this behavior, but CGT 22.6.0 has it for sure.

    Regards,
    Andy

  • Hi Andy,

    Thanks for your reply. Now it is clear to me.

    One additional question: Is it even required to protect the write to registers like (PIEIER, PIEACK, peripheral Interrupt Flag, etc..)?

    So, would it be also fine i I just add DINT at the very end of the isr? 

    Like:

    ...

        // isr-code
    PieCtrlRegs.PIEIER2.all = TempPIEIER;
    DINT; }
  • The example in https://software-dl.ti.com/C2000/docs/c28x_interrupt_nesting/html/index.html shows that when PIEIER is modified, before restoring the old value of the PIEIER, the interrupts are disabled. I really do not know if there will be any side effects by not doing that, and relying only by DINT inserted by the compiler. But in all my code that is using such scenario I DO disable interrupts manually before restoring PIEIER.

    This whole interrupt nesting thing in C2000 is not very well described in the manuals or the wiki above. The wiki is outdated. It doesn't mention about DINT made by compiler, it also does not deal with a case when you have to modify PIEIER of different PIE group than the ISR you are in (the special case with 5 nops described in the TRM in the chapter "Disabling interrupts"). This should be updated by TI - gathering all the information in one place. As for now, users has to look in different places (wiki, TRM, this forum).

    Best regards,
    Andy