Actually I'm adding code to CPU2 to perform some task. I'm stuck on early main point which is:
Device_init(); // Configure PLL, disable WD, enable peripheral clocks.
In this function there's a Flash initialization:
#ifdef _FLASH
#ifndef CMDTOOL
//
// Copy time critical code and flash setup code to RAM. This includes the
// following functions: InitFlash();
//
// The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart symbols
// are created by the linker. Refer to the device .cmd file.
//
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
#endif
//
// Call Flash Initialization to setup flash waitstates. This function must
// reside in RAM.
//
Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES);
#endif
At this point, when executed, I've an Abort.
Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES);
Actually, since code is empty and it's the first executed function. I suppose there's some kind of problem in .cmd file.
I've reused my OLD CPU1 .cmd file that I report here:
MEMORY {
PAGE 0 : /* Code page (in flash) */
/* This memory block loaded with the reset vector only if
booting from XINTF Zone 7. Otherwise reset vector is
fetched from boot ROM. See .reset section below */
/* f2812 RESET : origin = 0x3FFFC0, len = 0x000002 */
/* f28388d RESET : origin = 0x3FFFC0, length = 0x000002 */
/* --> Flash sectors x Application -----------------------
FLASH0 : origin = 0x080002, length = 0x001FFE
FLASH1 : origin = 0x082000, length = 0x002000
FLASH2 : origin = 0x084000, length = 0x002000
FLASH3 : origin = 0x086000, length = 0x002000
FLASH4 : origin = 0x088000, length = 0x008000
FLASH5 : origin = 0x090000, length = 0x008000
FLASH6 : origin = 0x098000, length = 0x008000
FLASH7 : origin = 0x0A0000, length = 0x008000
FLASH8 : origin = 0x0A8000, length = 0x008000
FLASH9 : origin = 0x0B0000, length = 0x008000
FLASH10 : origin = 0x0B8000, length = 0x002000
FLASH11 : origin = 0x0BA000, length = 0x002000
<-- Flash sectors x Application -------------------------- */
/* BEGIN is used for the "boot to Flash" bootloader mode */
FLASH_BOOT : origin = 0x080000, length = 0x000002
CODE_ID : origin = 0x080002, length = 0x000008 /* identificativo applicativo */
APPLSTART : origin = 0x08000a, length = 0x000002 /* start of applicativo */
// CODE : origin = 0x08000c, length = 0x03BFF0 /* area per codice applicativo */
CODE : origin = 0x080010, length = 0x07FF0 /* area per codice applicativo */
CODE2 : origin = 0x088000, length = 0x08000 /* area per codice applicativo */
CODE3 : origin = 0x090000, length = 0x08000 /* area per codice applicativo */
CODE4 : origin = 0x098000, length = 0x08000 /* area per codice applicativo */
CODE5 : origin = 0x0A0000, length = 0x08000 /* area per codice applicativo */
CODE6 : origin = 0x0A8000, length = 0x08000 /* area per codice applicativo */
CODE7 : origin = 0x0B0000, length = 0x08000 /* area per codice applicativo */
CODE8 : origin = 0x0B8000, length = 0x03FF0 /* area per codice applicativo */
BOOTOPZ : origin = 0x0BBFFE, length = 0x000001 /* S11 */
FWMAGICNUM : origin = 0x0BBFFF, length = 0x000001 /* S11 */
/* --> Flash sectors x Bootloader -------------------------------
FLASH12 : origin = 0x0BC000, length = 0x002000
FLASH13 : origin = 0x0BE000, length = 0x001FF0
FLASH13_RSVD : origin = 0x0BFFF0, length = 0x000010 / * Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" * /
<-- Flash sectors x Bootloader --------------------------------- */
//FLASH13_RSVD : origin = 0x0BFFF0, length = 0x000010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
FIRMWARE_ID : origin = 0x0BFFF0, length = 0x000010
BTIDVERSEC : origin = 0x0BC000, length = 0x000008 /* FLASH12 id bootloader */
BLFLASH : origin = 0x0BC008, length = 0x003fe7 /* FLASH12 Area codice Bootloader */
/*/**/ FLASHBOOT : origin = 0x3F6FF6, length = 0x000002 /* Entry point da boot da flash */
PAGE 1: /* area di ram Ram */
/* --> Ram Sectors -----------------------------------------------
* Mx e Dx => Dedicated Ram
* LSx => Local Share Ram
* GSx => Global Share Ram
BOOT_RSVD : origin = 0x000002, length = 0x0001AF / * Part of M0, BOOT rom will use this for stack * /
RAMM0 : origin = 0x0001B1, length = 0x00024F
RAMM1 : origin = 0x000400, length = 0x0003F8 / * on-chip RAM block M1 * /
RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 / * Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" * /
RAMD0 : origin = 0x00C000, length = 0x000800
RAMD1 : origin = 0x00C800, length = 0x000800
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMLS6 : origin = 0x00B000, length = 0x000800
RAMLS7 : origin = 0x00B800, length = 0x000800
RAMGS0 : origin = 0x00D000, length = 0x001000
RAMGS1 : origin = 0x00E000, length = 0x001000
RAMGS2 : origin = 0x00F000, length = 0x001000
RAMGS3 : origin = 0x010000, length = 0x001000
RAMGS4 : origin = 0x011000, length = 0x001000
RAMGS5 : origin = 0x012000, length = 0x001000
RAMGS6 : origin = 0x013000, length = 0x001000
RAMGS7 : origin = 0x014000, length = 0x001000
RAMGS8 : origin = 0x015000, length = 0x001000
RAMGS9 : origin = 0x016000, length = 0x001000
RAMGS10 : origin = 0x017000, length = 0x001000
RAMGS11 : origin = 0x018000, length = 0x001000
RAMGS12 : origin = 0x019000, length = 0x001000
RAMGS13 : origin = 0x01A000, length = 0x001000
RAMGS14 : origin = 0x01B000, length = 0x001000
RAMGS15 : origin = 0x01C000, length = 0x000FF8
RAMGS15_RSVD : origin = 0x01CFF8, length = 0x000008 / * Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" * /
<-- Ram Sectors ----------------------------------------------- */
RAMMx : origin = 0x0001B1, length = 0x000647
M1RAM_RSVD : origin = 0x0007F8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RAMD0 : origin = 0x00C000, length = 0x000800
RAMD1 : origin = 0x00C800, length = 0x000800
RAMLSx : origin = 0x008000, length = 0x003000 /* RAMLS0..5 */
RAMGSx : origin = 0x00D000, length = (0x001000*14) /* RAMGS0..13 */
/* ADDED DEDICATED FOR IQMATH */
RAMGS14 : origin = 0x01B000, length = 0x001000
RAMGS15 : origin = 0x01C000, length = 0x000FF8
CPU1TOCPU2RAM : origin = 0x03A000, length = 0x000800
CPU2TOCPU1RAM : origin = 0x03B000, length = 0x000800
CPUTOCMRAM : origin = 0x039000, length = 0x000800
CMTOCPURAM : origin = 0x038000, length = 0x000800
CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
/*/* definire zona FPGA */
FPGA_Zone0 : origin = 0x300000, len = 0x1000
FPGA_Zone1 : origin = 0x100000, len = 0x8000
PAGE 2: /* area di ram riservata per bootloader */
M0BOOT_RSVD : origin = 0x000002, length = 0x0001AF /* Part of M0, BOOT rom will use this for stack */
PAGE 3: /* area di ram ex esterna */
/* l'area di diagnostica e' allocata nella ram esterna */
/* RAMGS11..14 : origin = 0x018000, length = 0x001000 */
EXT_RAM : origin = 0x18000, length = 0x4000
/* RAMGS9..10 : origin = 0x016000, length = 0x001000 */
DIAGSECT : origin = 0x016000, length = 0x2000
PAGE 4: /* ramfunc (possibile overload) */
/* Questa sezione deve coincidere con un area dati dell'applicativo che viene compilata dopo la cold start */
/* f2812 CodeLSARAM : origin = 0x008000, len = 0x0100 */
/* RAMGS15 : origin = 0x01C000, length = 0x000FF8 */
CodeRAMLx : origin = 0x01C000, length = 0x0100
PAGE 5: /* overload */
/* area di overload dati */
/* f2812 OVL_HxSARAM : origin = 0x3f8000, len = 0x2000 / * area overload con dati applicativo */
}
SECTIONS
{
/* Mappatura in flash */
/* mappatura del codice di boot da flash (vettore) */
/* --> Entry point fw se non c'e' bootloader */
/* F2812 codestart : > FLASHBOOT, PAGE = 0 */
/* F28388d codestart : > BEGIN, ALIGN(8) , PAGE = 0 */
/* <-- Entry point fw se non c'e' bootloader */
/* --> Entry point applicativo da bootloader */
// vettore di reset senza bootloader
codestart : > FLASH_BOOT, ALIGN(8), PAGE = 0
// vettore di reset (bootloader o applicativo)
// bootload_boot : > FLASH_BOOT, PAGE = 0, TYPE = NOLOAD
/* <-- Entry point applicativo da bootloader */
applstart : > APPLSTART, ALIGN(8), PAGE = 0
/* --> Id per verifica presenza applicativo */
bootload_magic : > FWMAGICNUM, ALIGN(8), PAGE = 0
/* <-- Id per verifica presenza applicativo */
/* definzione inizio codice con identificativo + versione + revisione */
FWIDVER : > CODE, ALIGN(8), PAGE = 0 // XXX to put in CODE_ID
BTIDVER : > BTIDVERSEC, ALIGN(8), PAGE = 0, TYPE = NOLOAD
/* .reset : > RESET, TYPE = DSECT, PAGE = 0 / * not used, */
/* --> in flash */
.text : >> CODE | CODE2 | CODE3 | CODE4 | CODE5 | CODE6 | CODE7 | CODE8, ALIGN(8), PAGE = 0
.switch : >> CODE | CODE2 | CODE3 | CODE4 | CODE5 | CODE6 | CODE7 | CODE8, ALIGN(8), PAGE = 0
.cinit : > CODE5, ALIGN(8), PAGE = 0
.const : >> CODE | CODE2 | CODE3 | CODE4 | CODE5 | CODE6 | CODE7 | CODE8, ALIGN(8), PAGE = 0 /* Initalized sections go in Flash */
.init_array : >> CODE | CODE2 | CODE3 | CODE4 | CODE5 | CODE6 | CODE7 | CODE8, ALIGN(8), PAGE = 0
.binit : > CODE5, ALIGN(8), PAGE = 0
.fwid : > FIRMWARE_ID, ALIGN(8), PAGE = 0
/* <-- in flash */
/* --> in ram */
/* .stack : > RAMM1 */
/* .stack : > RAMMx, PAGE = 1 */
.stack : > RAMLSx, PAGE = 1
.bss : > RAMLSx | RAMGSx, PAGE = 1
.bss:output : > RAMLSx, PAGE = 1
.bss:cio : > RAMLSx, PAGE = 1
/* f2812 .cio align(0) : {} > L0SARAM, PAGE = 1 */
.data : >> RAMLSx | RAMGSx, PAGE = 1
/* F2812 .data align(0) : {} > L0SARAM, PAGE = 1 */
.sysmem : > RAMLSx, PAGE = 1
/* <-- in ram */
/*
ramgs0 : > RAMGS0, type=NOINIT, PAGE = 1
ramgs1 : > RAMGS1, type=NOINIT, PAGE = 1
*/
MSGRAM_CPU1_TO_CPU2 : > CPU1TOCPU2RAM, type=NOINIT , PAGE = 1
MSGRAM_CPU2_TO_CPU1 : > CPU2TOCPU1RAM, type=NOINIT, PAGE = 1
MSGRAM_CPU_TO_CM : > CPUTOCMRAM, type=NOINIT, PAGE = 1
MSGRAM_CM_TO_CPU : > CMTOCPURAM, type=NOINIT, PAGE = 1
/* The following section definition are for SDFM examples * /
Filter_RegsFile : > RAMGS0
Filter1_RegsFile : > RAMGS1, fill=0x1111
Filter2_RegsFile : > RAMGS2, fill=0x2222
Filter3_RegsFile : > RAMGS3, fill=0x3333
Filter4_RegsFile : > RAMGS4, fill=0x4444
Difference_RegsFile : > RAMGS5, fill=0x3333
*/
/* Mappatura di memoria per algo TrySep */
/* todel TRYSEP_RAM_IIR align(0) : {} > H0SARAM, PAGE = 1 */
CHKEXTRAM align(0) : {} > EXT_RAM, PAGE = 3
ASEP_2P_RAM align(0) : {} > EXT_RAM, PAGE = 3
ASEP_1P_RAM align(0) : {} > EXT_RAM, PAGE = 3
ASEP_FNC_RAM align(0) : {} > EXT_RAM, PAGE = 3
ASEP_SIG_RAM align(0) : {} > EXT_RAM, PAGE = 3
MOT_PARMA align(0) : {} > EXT_RAM, PAGE = 3
MOT_PARxx align(0) : {} > EXT_RAM, PAGE = 3
Mx_DEFTABCN align(0) : {} > EXT_RAM, PAGE = 3
File_ebss align(0) : {} > EXT_RAM, PAGE = 3
/* Section secureramfuncs used by InitFlash() */
/* F2812
secureRamFuncs: LOAD = CODE, PAGE = 0 / * can be ROM * /
RUN = CodeLSARAM, PAGE = 2 / * must be CSM secured RAM * /
LOAD_START(_secureRamFuncs_loadstart),
LOAD_END(_secureRamFuncs_loadend),
RUN_START(_secureRamFuncs_runstart)
*/
.TI.ramfunc : {} LOAD = CODE5, PAGE = 0,
RUN = CodeRAMLx, PAGE = 4,
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
ALIGN(8)
WD_RAM align(0): {} > RAMLSx, PAGE = 1
DIAG_RAM : > DIAGSECT, PAGE = 3
/* allocazione tabelle cn sezione */
/* to del TABCN_SEZ : > RAMMx, PAGE = 1 */
/* allocazione tabelle per IQMath F2812 */
/*
IQmathTables : > MathTableROM, PAGE = 1, TYPE = NOLOAD / * per simularle vanno caricate: togliere NOLOAD * /
IQmath : > CODE, PAGE = 0
*/
/* Allocate IQ math areas: F28388D * /
IQmath : > FLASH1, PAGE = 0, ALIGN(8) / * Math Code * /
IQmathTables : > FLASH2, PAGE = 0, ALIGN(8)
*/
/* The following section definition are for IQMATH tutte in ram */
// IQmath : > RAMGSx, PAGE = 1
// IQmathTables : > RAMGSx, PAGE = 1
// IQmathTablesRam : > RAMGSx, PAGE = 1
/* IQmath inclues the assembly routines in the IQmath library
IQmathTables is used by division, IQsin, IQcos, IQatan, IQatan2
this is in boot ROM so we make it NOLOAD. Using
the ROM version saves space at the cost of 1 cycle
per access (boot ROM is 1 wait).
IQmathTablesRam is used by IQasin, IQacos, and IQexp
on 2833x and 2823x the IQNexpTable is in ROM so it
is placed in its own section. If IQexp or IQNexp is
not called by the program, this will cause a linker
warning.
*/
//IQmath : > RAML1L2, PAGE = 0
//IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD
//IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
//IQmathTablesRam : > RAML4, PAGE = 1
/* The following section definition are for IQMATH */
/*
IQmath : > RAMGS14
IQmathTables : > RAMGS14
//IQmathTables2 : > RAMGS15
//IQmathTables3 : > RAMGS15
IQmathTablesRam : > RAMGS15
*/
IQmath : > CODE, PAGE = 0, ALIGN(8)
//IQmathTables : > CODE, PAGE = 0, ALIGN(8)
//IQmath : > FLASH11, PAGE = 0
//IQmathTables : > FLASH11, PAGE = 0
//IQmathTables2 : > FLASH11, PAGE = 0
//IQmathTables3 : > FLASH11, PAGE = 0
//IQmathTablesRam : > RAMGS15
/* allocazione FPGA HW */
HW_FPGA : > FPGA_Zone0, PAGE = 1
HW_FPGA_v2 : > FPGA_Zone1, PAGE = 1
/* codice configurazione fpga */
/*todel lca_code : > CODE, PAGE = 0 */
/*todel ovl_FPGA : > OVL_HxSARAM , PAGE = 4 / * per lzunzip.obj */
/* --> in andra' in CPU 2 */
/* allocazione specifica dell'area ram per libreria dsp */
ACQ_IIR_RAM align(0): {} > RAMGSx, PAGE = 1
/* <-- in andra' in CPU 2 */
}
FWIDVER_ADDR = START(FIRMWARE_ID);
I can't really figure out what can go wrong from CPU1 to CPU2 in this .cmd , can you help me find the problem?
