TMS320F280025: UL1998 RAM Testing

Hello,

Have you verified at what exact instruction it enters the illegal operation handler? Have you made sure the array indexes and address accesses that are occurring near or at this time are valid? When you get to the illegal operation handler, can you see what function is being pointed to by the return address register in the CPU?

Best regards,

Omer Amir

Hi

• illegal operation handler is triggered during restore  the value from temporary storage back to original address 
• The code works properly from address 0x128 to 0xAA??. illegal operation handler always tiggers in some value of address 0xAA??
• fyi…Interrupt is disable as the code run in main loop…the reason to move the to ISR because of our digital powers buck converter stop response as do the ram test in main loop. It is not good.
• You mentioned that "What functions is being pointed to by the return address register in the CPU?", I don't know how to check it

Hello,

Hung Kai Woo1 said:

illegal operation handler is triggered during restore  the value from temporary storage back to original address

What line is this in your code? I don't know if this is in your code above or elsewhere in your program.

Hung Kai Woo1 said:

The code works properly from address 0x128 to 0xAA??. illegal operation handler always tiggers in some value of address 0xAA??

What do you mean by this? Are you saying accesses to memory at 0x128 to 0xAA, as in through using a pointer or array?

Hung Kai Woo1 said:

You mentioned that "What functions is being pointed to by the return address register in the CPU?", I don't know how to check it

This return address is stored in the RPC (Return Program Counter). You can find this in the Registers window in your debug session.

The above screenshot comes from the C28x Instruction Set.

Best regards,

Omer Amir

Hi

My code will copy the content of testing RAM to temporary RAM is behind 0xC7B2. This area does not test by the code. Below is the code copy the content of test RAM

            ramR1_Copy = *ramR1Address_pr;
            ramR1_NextCopy =  *ramR1AddressNext_pr;

where ramR1_Copy and ram_NextCopy is defined behind 0xC7B2, ramR1Address_pr/ramR1AddressNext_pr is pointer to address of test RAM.

The pointer is defined with below code and Ram_TempCopy2 is behind 0xC782.

#pragma DATA_SECTION(ramR1Address_pr,"Ram_TempCopy2");
    uint32_t *ramR1Address_pr = (uint32_t *) 0x00000128;
#pragma DATA_SECTION(ramR1AddressNext_pr,"Ram_TempCopy2");
    uint32_t *ramR1AddressNext_pr = (uint32_t *) 0x0000012A;

After a March test (with 12 patterns write/read to test address), the content is restored from temporary area to test addresses.

            *ramR1Address_pr = ramR1_Copy;
            *ramR1AddressNext_pr = ramR1_NextCopy;

ramR1Address_pr and ramR1AddressNext_pr with increased by 1

            if (x > 4000)
            {
                if (ramR1Address_pr == (uint32_t *)0x000007F2) // the pointer must be even number because pointer increases by 2
                {
                    ramR1Address_pr = (uint32_t *)0x0000A000;
                    ramR1AddressNext_pr = (uint32_t *)0x0000A002;
                } else if (ramR1Address_pr == (uint32_t *)0x0000C7B2)
                {
                    ramR1Address_pr = (uint32_t *)0x00000128;
                    ramR1AddressNext_pr = (uint32_t *)0x000012A;

                }
                else
                {

                    ramR1AddressNext_pr++;
                    ramR1Address_pr++;
                }
                pattern_index = 0;
                x = 0;
            }
        }

You can found that the the code will skip some address because of linker information said skipped address should not be accessed and it is not address of RAM.

Regarding to meaning of "0x0128" to "0xAA??" work properly. It means that the code does the test from pointer from 0x128 to 0xAA?? properly. where "??" is last 2 digits of pointer. The value is not fixed in different compilation.

I am located in Asia. Is it possible to have some FAE from Asia to support the problem. It is because it is very urgent. Safety agent wait for us to fix this issue for the application.

Hello,

Hung Kai Woo1 said:

I am located in Asia. Is it possible to have some FAE from Asia to support the problem.

More than likely the FAE would also be going through E2E for this sort of question, so the problem would be getting solved at the same rate.

Hung Kai Woo1 said:

After a March test (with 12 patterns write/read to test address), the content is restored from temporary area to test addresses.

            *ramR1Address_pr = ramR1_Copy;
            *ramR1AddressNext_pr = ramR1_NextCopy;

From what you've said previously, it sounds like the illegal operation handler happens when this code is executed, is that correct? If that's so, do you mind stepping through the code here to see if any of the CPU registers are incorrectly changed? Please also take a look at the Disassembly window and Memory Browser so that you can verify that the changes that are happening are intended.

Best regards,

Omer Amir

1.The content is memory browser is correct. 

2.I am not familiar in Assembly code.

3.Could we have on-line call to verify the problem?

I found something very strange as I use Disassembly feature in CCS.

I captured below code in Disassembly as program running without any problem

 437                *ramR1AddressNext_pr = ramR1_NextCopy;
00aa37:   0638        MOVL         ACC, @0x38
00aa38:   761F031E    MOVW         DP, #0x31e
00aa3a:   1EC5        MOVL         *+XAR5[0], ACC
 438                *ramR1Address_pr = ramR1_Copy;
00aa3b:   0636        MOVL         ACC, @0x36
00aa3c:   1EC6        MOVL         *+XAR6[0], ACC

I captured code in Disassembly as program running with illegal operation triggered

 437                *ramR1AddressNext_pr = ramR1_NextCopy;
00aa37:   0F0F        CMPL         ACC, @0xf
00aa38:   0000        ITRAP0       
00aa39:   0000        ITRAP0       
00aa3a:   1EC5        MOVL         *+XAR5[0], ACC
 438                *ramR1Address_pr = ramR1_Copy;
00aa3b:   0636        MOVL         ACC, @0x36
00aa3c:   1EC6        MOVL         *+XAR6[0], ACC

You can found that assembly for *ramR1AddressNext_pr = ramR1_NextCopy; is charged.

Any comment?