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TMS320F2800137: SCIA module not waiting for start bit after SW reset

Manuel Philippin
Intellectual 1925 points

Part Number: TMS320F2800137
Other Parts Discussed in Thread: LAUNCHXL-F2800137

Hello,

my customer is currently working with the LAUNCHXL-F2800137 and has run into a problem with the SCIA module.

The SCIA module is initialized and sending data is working correctly. 

For reading data, they want to wait for a break event and therefore use the SCI_INT_RXRDY_BRKDT interrupt. The interrupt is also working correctly. 


The problem occurs if a SW reset is issued. After that the SCIA module is not waiting for the start bit but starts to fill up the FIFO right away.

This behaviour is shown in the picture below:



Time stamps:
1. Break interrupt
2. SW Reset (sampling starting without the start bit being issued)
3. Next start-bit
4. It can be seen that samping already starts at 2. since there is a framing error in the byte being sent

If a while loop is added to the break interrupt that is waiting for the start bit it is working, however this is not a real solution.

Is there anything else to consider for working correctly with the SCIA module?

Best regards

Manuel

  • 0
    TI__Mastermind 28580 points

    Hi Manuel,

    What exactly are you checking in the while loop that causes your code to work? I know this is not a desirable solution but this may help determine the root cause of the issue and find a better workaround.

    Thank you,

    Luke

  • 0 in reply to Luke Jones
    Prodigy 20 points

    Hi Luke,

    the while loop is waiting that the level of the RX-Pin is at a high level.

    I suspect after a software reset the SCI modul has a init state of the RX-Pin at high level but the real level is low. Then a start bit is detected and it begins to fill the fifo, or it didn't wait for a falling edge to detect the start bit.

    Best regards

    Markus

  • 0 in reply to Markus Borck
    TI__Mastermind 28580 points

    Hi Markus,

    I've discussed this issue with another one of our SCI experts. In order for the SCI to halt the receiving of transmissions until the SCIRX line is driven high again, the SCI must be manually held in reset similar to how you already do so in the while loop in your ISR. Could you instead put a while loop or if statement in your main function instead to prevent your code getting stuck in your ISR? This is the recommended method for pausing SCI receptions until the break-detect condition is over.

    Thank you,

    Luke

  • 0 in reply to Luke Jones
    Prodigy 20 points

    Hi Luke,

    So the SCI module does not behave correctly here, because it does not wait for a start bit after a reset. You define the start bit in your C2000 Academy as 4 SCICLK zeros after a falling edge (dev.ti.com/.../node

    This is a big disadvantage because blocking the ISR is not an option and in the MAIN loop it can not be guaranteed that the reset happens in the time between the end of the BREAK and the new start bit.

    Best regards

    Markus

  • 0 in reply to Markus Borck
    TI__Mastermind 28580 points

    Hi Markus,

    Understood, I will look into finding another workaround for this, please expect a response back by tomorrow.

    Thank you,

    Luke

  • 0 in reply to Luke Jones
    TI__Mastermind 28580 points

    Hi Markus,

    To clarify this statement: 

    in the MAIN loop it can not be guaranteed that the reset happens in the time between the end of the BREAK and the new start bit.

    Are you saying that the SCIRX will not return high long enough for the receiver application code to stop holding the SCI in reset?

    If so, perhaps you could set a GPIO on the receiver high when the SCI is in reset/break detect mode. This GPIO could be read by the transmitter, signaling it to stop sending transmissions until the SCIRX line returns high. Once the receiver reads the SCIRX line as high and stops holding the SCI in reset, it could set the status GPIO low, which would be read by the transmitter and SCI transmission would resume. Is this a suitable workaround? To my knowledge there is no hardware capability in the SCI to stop receiving characters until a falling edge is detected. If the SCI is reset and the SCIRX line is low, this will be perceived as a start bit as you are experiencing now.

    Thank you,

    Luke

  • 0 in reply to Luke Jones
    TI__Mastermind 28580 points

    Hi Markus,

    I have one question about this implementation. Are you manually inducing the break detect condition to signal the start of transmission. If so, can you not hold the SCIRX line high instead until the first frame is sent?

    Thank you,

    Luke

  • 0 in reply to Luke Jones
    TI__Mastermind 28580 points

    Hi Markus,

    Another potential solution is to disable the SCIRX line after the break detect occurs. This can be done by reconfiguring the GPIO used for SCIRX as a normal GPIO. Then you can configure an external interrupt to trigger when the SCIRX line goes high(this interrupt would only be enabled after a break detect). In the XINT ISR, you can reconfigure the corresponding GPIO to be SCIRX, and disable the XINT interrupt until the next break detect occurs.

    This solution would depend on SCIRX remaining high enough to allow the SCIRX line to be reenabled in the ISR. Let me know if you believe this workaround may be suitable for your application.

    Thank you,

    Luke