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TMS320F2800157-Q1: TMS320F2800156-Q1 XCLKOUT

Chris Willis
Intellectual 290 points
Part Number: TMS320F2800157-Q1
Other Parts Discussed in Thread: ADS131M03-Q1, C2000WARE

what frequencies are available for to supply a clock for an ADC

we would like to clock the ADS131M03-Q1 as fast as possible using the TMS320F2800156-Q1 

From what I can tell, the ADC has a maximum external clock source of 8.4MHz 

The XCLKOUT pin is used to bring out the clock from the MCU and with an MCU system clock of 100MHz.

I was told that the 157 w/ clock of 120MHz had "base frequencies" of 20, 120, and 140 which could be divided down using XCLKOUTDIV by a value of 1, 2, 4, or 8

I dont know if that is 100% accurate and if so I dont know what the 156 base frequencies are that can be divided down.

  • 0
    TI__Genius 11071 points

    Hello Chris,

    I'm not sure who mentioned "base frequencies" to you, there is no such thing. The device has an input clock (crystal or internal oscillator) called OSCCLK, which is fed into a PLL. The output of the PLL (PLLCLKOUT) goes into the SYSCLK divider, and the divider output goes into the CPU and other system components.

    XCLKOUT is a mechanism that can be used to bring out various system clock domains onto a GPIO pin. The available clock sources for XCLKOUT are PLLSYSCLK, PLLRAWCLK, SYSCLK, INTOSC1, INTOSC2, and XTAL. The selected clock source can be divided down using XCLKOUTDIVSEL before coming out on the pin.

    Please refer to the device TRM, under System Control and Interrupts > Clocking. It comprehensively describes the F280015x clock system, the various domains and how to configure.

    Best regards,
    Ibukun

  • 0 in reply to Ibukun Olumuyiwa
    Intellectual 290 points

    What are the frequencies of PLLSYSCLK, PLLRAWCLK, SYSCLK, INTOSC1, INTOSC2, and XTAL?

  • 0 in reply to Chris Willis
    TI__Genius 11071 points

    Hello Chris,

    The TRM explains all of these clock domains and how they are connected. That is a lot more information than I can fit into a quick forum post. INTOSC1 and INTOSC2 are fixed frequency 10MHz internal oscillators; XTAL is the frequency of the external crystal you've chosen to use, and the rest are internal clock domains dependent on your system design. Typically you would configure your PLL such that you're running SYSCLK at the maximum device frequency which is 120MHz for the F280015x, but you could choose to run it slower if required by your system.

    Best regards,
    Ibukun

  • 0 in reply to Ibukun Olumuyiwa
    Intellectual 290 points

    I probably should have included better details. We plan to clock the ADS131M03-Q1 using the MCU and want to maximize the speed. From what I can tell the datasheet says the nominal maximum is 8.192MHz and MAX maximum is 8.4MHz.

    INTOSC1 / 2 would be 5MHz but I was hoping to get closer.

    Can you tell me how close we can get to that?

  • 0 in reply to Chris Willis
    TI__Genius 11071 points

    Chris,

    Conventionally XCLKOUT is the only clock output pin, and you would only be able to achieve 5MHz. But one way you could achieve your goal is to use the EPG. This is a relatively new module that enables generation of arbitrary data patterns and clocks. Essentially, you could use the EPG's clock generator block to divide SYSCLK down (e.g. 120MHz/15 = 8MHz), and then send that clock out through the output XBAR.

    For more details on how to use this module, please see the EPG chapter in the device TRM. There is also an example in C2000Ware (epg_ex1_generate_clocks) that you can use as a starting point.

    Best regards,
    Ibukun