TMS320F28388D: a clock conflict between demo and datasheet when using CM and EtherCAT

Hi Team,

1. My customer found a conflict between C2000Ware demo and datasheet when operating CM and EtherCAT.

For example, C:\ti\c2000\C2000Ware_4_03_00_00\libraries\communications\Ethercat\f2838x\examples\f2838x_cpu1_allocate_ecat_to_cm --> f2838x_cpu1_allocate_ecat_to_cm.c, from line168 to 174:

    //
    // Setup AUX Clock for ECAT and CM
    // Configured to 500MHz raw ((25 * 20 IMULT) /1)
    //
    SysCtl_setAuxClock(SYSCTL_AUXPLL_ENABLE | SYSCTL_AUXPLL_OSCSRC_XTAL |
                       SYSCTL_AUXPLL_IMULT(20) | SYSCTL_AUXPLL_FMULT_0 |
                       SYSCTL_AUXPLL_DIV_1);

It configured AUXPLLRAWCLK to 500MHz, But the -->datasheet<-- illustrate that the maximum value of this parameter is 400MHz:

(P114 7.10.3.2.2.1 Internal Clock Frequencies)

(Even in C2000Ware_5_00_00_00, the AUXPLLRAWCLK also be configured to 500MHz.)

2. How to achieve to configure AUXPLLRAWCLK to 400MHz, ETHERCAT's clock to 100MHz, and CM to 125MHz simultaneously?

--

Thanks & Regards

Yale