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TMS320F28379D: SCI usage as serial and error

Part Number: TMS320F28379D


Hi everybody  

two questions / confirmations:

-   RXERROR, FRAME ERROR  and  BRKDETECT   are always updated  even if in FIFO mode ?     or the one valid are the two error bits  coming together w the DATA  received ?

- if you have these errors   are you frozen to receive new data ?   

   it happens  SCI hangs in my case and onlu a reset makes it start again 

thank you 

BR


Carlo

  • Hi Carlo,

    Thanks for your questions.

    -   RXERROR, FRAME ERROR  and  BRKDETECT   are always updated  even if in FIFO mode ?

    Yes

    - if you have these errors   are you frozen to receive new data ?   

    You will receive more data in the FIFO (unless it is full), but the errors will stay till you clear them.

    So you need to clear the errors.

    Regards,

    Vince

  • Thanks all

    I think I have solved the problem... Using the SCI Rx interrupt is strongly recommended to enable also rx error interrupt. In the rx interrupt procedure the sw shall check if interrupt is caused by new reception or error, if it is an error interrupt the sw shall reset the SCI and if in FIFO mode reset also the rx FIFO.

    Checking for error in the rx interrupt procedure without enabling error interrupt is not enough to guarantee an error safe communication and may stop communication.

    Best Regards