Hi Champs,
I have a question about ISR Latency.
https://software-dl.ti.com/C2000/docs/c28x_interrupt_faq/html/index.html
In the diagram of ISR latency on the URL page, it is stated that a minimum of 14 cycles or 16 cycles is required until entering the ISR.
Does this mean that a similar cycle is required when exiting the ISR?
Thank you very much for help.
Best regards,
Yuka
