Part Number: TMS320F280037C
Other Parts Discussed in Thread: TMS320F280037, C2000WARE
Hi,
I'm using the TMS320F280037 to control a T Type inverter, to do that I need 12 PWMs, but at this moment I can only generate 8 PWM signals that are PWM 1A, 1B, 2A, 2B, 3A, 3B, 4A and 4B. PWMs 5A, 7A, 7B, and 8A are not working. Probably there's something wrong or missing in my code. Could you analyze my code and make some suggestions?
int main(void)
{
InitSysCtrl(); // Initialize device clock and peripherals
DINT; // Disable CPU interrupts
InitPieCtrl(); // Initializes the PIE control registers to a known state
IER = 0x0000; // Disable CPU interrupts
IFR = 0x0000; // Clear all CPU interrupt flags
InitPieVectTable(); // Initialize the PIE vector table
// Setups
Setup_GPIO(); // Setup GPIO's
Setup_ePWM(); // Setup ePWM's
EINT; //Enable Global interrupt INTM
ERTM; //Enable Global realtime interrupt DBGM
while(1)
{
EPwm1Regs.CMPA.bit.CMPA = 50;
EPwm2Regs.CMPA.bit.CMPA = 100;
EPwm3Regs.CMPA.bit.CMPA = 150;
EPwm4Regs.CMPA.bit.CMPA = 200;
EPwm5Regs.CMPA.bit.CMPA = 250;
EPwm7Regs.CMPA.bit.CMPA = 300;
EPwm8Regs.CMPA.bit.CMPA = 350;
DELAY_US(5000000);
}
return 0;
}
void Setup_GPIO(void)
{
EALLOW;
//PWM 1
GpioCtrlRegs.GPAGMUX1.bit.GPIO0 = 0; //Select the GMUX for PWM 1A
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; //Select the MUX for PWM 1A
GpioCtrlRegs.GPAPUD.bit.GPIO0 = 1; //Disable pull-up resistor for PWM 1A
GpioCtrlRegs.GPAGMUX1.bit.GPIO1 = 0; //Select the GMUX for PWM 1B
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; //Select the MUX for PWM 1B
GpioCtrlRegs.GPAPUD.bit.GPIO1 = 1; //Disable pull-up resistor for PWM 1B
//PWM 2
GpioCtrlRegs.GPAGMUX1.bit.GPIO2 = 0; //Select the GMUX for PWM 2A
GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; //Select the MUX for PWM 2A
GpioCtrlRegs.GPAPUD.bit.GPIO2 = 1; //Disable pull-up resistor for PWM 2A
GpioCtrlRegs.GPAGMUX1.bit.GPIO3 = 0; //Select the GMUX for PWM 2B
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; //Select the MUX for PWM 2B
GpioCtrlRegs.GPAPUD.bit.GPIO3 = 1; //Disable pull-up resistor for PWM 2B
//PWM 3
GpioCtrlRegs.GPAGMUX1.bit.GPIO4 = 0; //Select the GMUX for PWM 3A
GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1; //Select the MUX for PWM 3A
GpioCtrlRegs.GPAPUD.bit.GPIO4 = 1; //Disable pull-up resistor for PWM 3A
GpioCtrlRegs.GPAGMUX1.bit.GPIO5 = 0; //Select the GMUX for PWM 3B
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1; //Select the MUX for PWM 3B
GpioCtrlRegs.GPAPUD.bit.GPIO5 = 1; //Disable pull-up resistor for PWM 3B
//PWM 4
GpioCtrlRegs.GPAGMUX1.bit.GPIO6 = 0; //Select the GMUX for PWM 4A
GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 1; //Select the MUX for PWM 4A
GpioCtrlRegs.GPAPUD.bit.GPIO6 = 1; //Disable pull-up resistor for PWM 4A
GpioCtrlRegs.GPAGMUX1.bit.GPIO7 = 0; //Select the GMUX for PWM 4B
GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 1; //Select the MUX for PWM 4B
GpioCtrlRegs.GPAPUD.bit.GPIO7 = 1; //Disable pull-up resistor for PWM 4B
//PWM 5
GpioCtrlRegs.GPAGMUX2.bit.GPIO16 = 0; //Select the GMUX for PWM 5A
GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1; //Select the MUX for PWM 5A
GpioCtrlRegs.GPAPUD.bit.GPIO16 = 1; //Disable pull-up resistor for PWM 5A
//PWM 7
GpioCtrlRegs.GPAGMUX2.bit.GPIO28 = 0; //Select the GMUX for PWM 7A
GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 1; //Select the MUX for PWM 7A
GpioCtrlRegs.GPAPUD.bit.GPIO28 = 1; //Disable pull-up resistor for PWM 7A
GpioCtrlRegs.GPAGMUX2.bit.GPIO29 = 0; //Select the GMUX for PWM 7B
GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 1; //Select the MUX for PWM 7B
GpioCtrlRegs.GPAPUD.bit.GPIO29 = 1; //Disable pull-up resistor for PWM 7B
//PWM 8
GpioCtrlRegs.GPAGMUX2.bit.GPIO24 = 0; //Select the GMUX for PWM 8A
GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 1; //Select the MUX for PWM 8A
GpioCtrlRegs.GPAPUD.bit.GPIO24 = 1; //Disable pull-up resistor for PWM 8A
EDIS;
}
void Setup_ePWM(void)
{
EALLOW; //Allow edition
CpuSysRegs.PCLKCR2.bit.EPWM1 = 1; //Enable ePWM1
CpuSysRegs.PCLKCR2.bit.EPWM2 = 1; //Enable ePWM2
CpuSysRegs.PCLKCR2.bit.EPWM3 = 1; //Enable ePWM3
CpuSysRegs.PCLKCR2.bit.EPWM4 = 1; //Enable ePWM4
CpuSysRegs.PCLKCR2.bit.EPWM5 = 1; //Enable ePWM5
CpuSysRegs.PCLKCR2.bit.EPWM7 = 1; //Enable ePWM7
CpuSysRegs.PCLKCR2.bit.EPWM8 = 1; //Enable ePWM8
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0; //Start synchrony with others PWM
//PWM 1
EPwm1Regs.TBPRD = 1200; //Set timer period (120e6)/(1*2*2)
EPwm1Regs.TBPHS.bit.TBPHS = 0; //Set phase shift
EPwm1Regs.EPWMSYNCOUTEN.all = SYNC_OUT_SRC_ENABLE_ALL;
EPwm1Regs.TBCTR = 0x0000; //Clear counter
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; //Count up/down
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; //Disable phase shift
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; //Prescale high speed clock
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1; //Prescale low speed clock
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; //Avoid multiples switching
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO_PRD; //Refresh duty cycle on top and base of triangular wave
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; //Same thing for module B
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO_PRD; //Same thing for module B
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; //Active Hi complementary
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; //Enable Dead time module
EPwm1Regs.DBFED.bit.DBFED = 10; //Fall dead time (0.5 us)
EPwm1Regs.DBRED.bit.DBRED = 10; //Rise dead time (0.25 us)
EPwm1Regs.AQCTLA.bit.PRD = AQ_NO_ACTION; //Action when achieve PRD value (no action in this case)
EPwm1Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION; //Action when achieve zero value (no action in this case)
EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR; //Action when achieve counter up value (clear in this case)
EPwm1Regs.AQCTLA.bit.CAD = AQ_SET; //Action when achieve counter down value (set in this case)
EPwm1Regs.ETSEL.bit.SOCAEN = 1; //Enable Start of Conversion for module A
EPwm1Regs.ETSEL.bit.SOCASEL = ET_CTR_PRDZERO; //ADC trigger on top
EPwm1Regs.ETPS.bit.SOCAPRD = ET_1ST; //Trigger on the first event
// PWM 2
EPwm2Regs.TBPRD = EPwm1Regs.TBPRD; //Same period of PWM 1
EPwm2Regs.TBPHS.bit.TBPHS = 0.5*EPwm1Regs.TBPRD;//Phase shift is 90 degrees (0.5*EPwm1Regs.TBPRD)
EPwm2Regs.EPWMSYNCINSEL.bit.SEL = SYNC_IN_SRC_SYNCOUT_EPWM1;
EPwm2Regs.TBCTR = 0x0000; //Clear counter
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; //Count up/down
EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE; //Enable phase shift
EPwm2Regs.TBCTL.bit.PHSDIR = TB_DOWN; //Phase shift direction (positive)
EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; //Prescale high speed clock
EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1; //Prescale low speed clock
EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; //Avoid multiples switching
EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO_PRD; //Refresh duty cycle on top and base of triangular wave
EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; //Same thing for module B
EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO_PRD; //Same thing for module B
EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; //Active Hi complementary
EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; //Enable Dead time module
EPwm2Regs.DBFED.bit.DBFED = 10; //Fall dead time (0.1 us)
EPwm2Regs.DBRED.bit.DBRED = 10; //Rise dead time (0.1 us)
EPwm2Regs.AQCTLA.bit.PRD = AQ_NO_ACTION; //Action when achieve PRD value (no action in this case)
EPwm2Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION; //Action when achieve zero value (no action in this case)
EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR; //Action when achieve counter up value (clear in this case)
EPwm2Regs.AQCTLA.bit.CAD = AQ_SET; //Action when achieve counter down value (set in this case)
EPwm2Regs.ETSEL.bit.SOCAEN = 1; //Enable Start of Conversion for module A
EPwm2Regs.ETSEL.bit.SOCASEL = ET_CTR_PRDZERO; //ADC trigger on top
EPwm2Regs.ETPS.bit.SOCAPRD = ET_1ST; //Trigger on the first event
// PWM 3
EPwm3Regs.TBPRD = EPwm1Regs.TBPRD; //Same period of PWM 1
EPwm3Regs.TBPHS.bit.TBPHS = 1*EPwm1Regs.TBPRD; //Phase shift is 180 degrees (1*EPwm1Regs.TBPRD)
EPwm3Regs.EPWMSYNCINSEL.bit.SEL = SYNC_IN_SRC_SYNCOUT_EPWM1;
EPwm3Regs.TBCTR = 0x0000; //Clear counter
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; //Count up/down
EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE; //Enable phase shift
EPwm3Regs.TBCTL.bit.PHSDIR = TB_DOWN; //Phase shift direction (positive)
EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; //Prescale high speed clock
EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1; //Prescale low speed clock
EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; //Avoid multiples switching
EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO_PRD; //Refresh duty cycle on top and base of triangular wave
EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; //Same thing for module B
EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO_PRD; //Same thing for module B
EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; //Active Hi complementary
EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; //Enable Dead time module
EPwm3Regs.DBFED.bit.DBFED = 10; //Fall dead time (0.1 us)
EPwm3Regs.DBRED.bit.DBRED = 10; //Rise dead time (0.1 us)
EPwm3Regs.AQCTLA.bit.PRD = AQ_NO_ACTION; //Action when achieve PRD value (no action in this case)
EPwm3Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION; //Action when achieve zero value (no action in this case)
EPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR; //Action when achieve counter up value (clear in this case)
EPwm3Regs.AQCTLA.bit.CAD = AQ_SET; //Action when achieve counter down value (set in this case)
EPwm3Regs.ETSEL.bit.SOCAEN = 1; //Enable Start of Conversion for module A
EPwm3Regs.ETSEL.bit.SOCASEL = ET_CTR_PRDZERO; //ADC trigger on top
EPwm3Regs.ETPS.bit.SOCAPRD = ET_1ST; //Trigger on the first event
// PWM 4
EPwm4Regs.TBPRD = EPwm1Regs.TBPRD; //Same period of PWM 1
EPwm4Regs.TBPHS.bit.TBPHS = 0.5*EPwm1Regs.TBPRD;//Phase shift is 270 degrees (0.5*EPwm1Regs.TBPRD)
EPwm4Regs.EPWMSYNCINSEL.bit.SEL = SYNC_IN_SRC_SYNCOUT_EPWM1;
EPwm4Regs.TBCTR = 0x0000; //Clear counter
EPwm4Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; //Count up/down
EPwm4Regs.TBCTL.bit.PHSEN = TB_DISABLE; //Enable phase shift
EPwm4Regs.TBCTL.bit.PHSDIR = TB_UP; //Phase shift direction (negative)
EPwm4Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; //Prescale high speed clock
EPwm4Regs.TBCTL.bit.CLKDIV = TB_DIV1; //Prescale low speed clock
EPwm4Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; //Avoid multiples switching
EPwm4Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO_PRD; //Refresh duty cycle on top and base of triangular wave
EPwm4Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; //Same thing for module B
EPwm4Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO_PRD; //Same thing for module B
EPwm4Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; //Active Hi complementary
EPwm4Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; //Enable Dead time module
EPwm4Regs.DBFED.bit.DBFED = 10; //Fall dead time (0.1 us)
EPwm4Regs.DBRED.bit.DBRED = 10; //Rise dead time (0.1 us)
EPwm4Regs.AQCTLA.bit.PRD = AQ_NO_ACTION; //Action when achieve PRD value (no action in this case)
EPwm4Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION; //Action when achieve zero value (no action in this case)
EPwm4Regs.AQCTLA.bit.CAU = AQ_CLEAR; //Action when achieve counter up value (clear in this case)
EPwm4Regs.AQCTLA.bit.CAD = AQ_SET; //Action when achieve counter down value (set in this case)
EPwm4Regs.ETSEL.bit.SOCAEN = 1; //Enable Start of Conversion for module A
EPwm4Regs.ETSEL.bit.SOCASEL = ET_CTR_PRDZERO; //ADC trigger on top
EPwm4Regs.ETPS.bit.SOCAPRD = ET_1ST; //Trigger on the first event
// PWM 5
EPwm5Regs.TBPRD = EPwm1Regs.TBPRD; //Same period of PWM 1
EPwm5Regs.TBPHS.bit.TBPHS = 0; //No Phase shift (0 degrees)
EPwm5Regs.EPWMSYNCINSEL.bit.SEL = SYNC_IN_SRC_SYNCOUT_EPWM1;
EPwm5Regs.TBCTR = 0x0000; //Clear counter
EPwm5Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; //Count up/down
EPwm5Regs.TBCTL.bit.PHSEN = TB_ENABLE; //Enable phase shift
EPwm5Regs.TBCTL.bit.PHSDIR = TB_DOWN; //Phase shift direction (positive)
EPwm5Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; //Prescale high speed clock
EPwm5Regs.TBCTL.bit.CLKDIV = TB_DIV1; //Prescale low speed clock
EPwm5Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; //Avoid multiples switching
EPwm5Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO_PRD; //Refresh duty cycle on top and base of triangular wave
EPwm5Regs.AQCTLA.bit.PRD = AQ_NO_ACTION; //Action when achieve PRD value (no action in this case)
EPwm5Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION; //Action when achieve zero value (no action in this case)
EPwm5Regs.AQCTLA.bit.CAU = AQ_CLEAR; //Action when achieve counter up value (clear in this case)
EPwm5Regs.AQCTLA.bit.CAD = AQ_SET; //Action when achieve counter down value (set in this case)
// PWM 7
EPwm7Regs.TBPRD = EPwm1Regs.TBPRD; //Same period of PWM 1
EPwm7Regs.TBPHS.bit.TBPHS = 0; //No Phase shift (0 degrees)
EPwm7Regs.TBCTR = 0x0000; //Clear counter
EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; //Count up/down
EPwm7Regs.TBCTL.bit.PHSEN = TB_DISABLE; //Enable phase shift
EPwm7Regs.TBCTL.bit.PHSDIR = TB_DOWN; //Phase shift direction (positive)
EPwm7Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; //Prescale high speed clock
EPwm7Regs.TBCTL.bit.CLKDIV = TB_DIV1; //Prescale low speed clock
EPwm7Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; //Avoid multiples switching
EPwm7Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO_PRD; //Refresh duty cycle on top and base of triangular wave
EPwm7Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; //Same thing for module B
EPwm7Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO_PRD; //Same thing for module B
EPwm7Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; //Active Hi complementary
EPwm7Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; //Enable Dead time module
EPwm7Regs.DBFED.bit.DBFED = 10; //Fall dead time (0.1 us)
EPwm7Regs.DBRED.bit.DBRED = 10; //Rise dead time (0.1 us)
EPwm7Regs.AQCTLA.bit.PRD = AQ_NO_ACTION; //Action when achieve PRD value (no action in this case)
EPwm7Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION; //Action when achieve zero value (no action in this case)
EPwm7Regs.AQCTLA.bit.CAU = AQ_CLEAR; //Action when achieve counter up value (clear in this case)
EPwm7Regs.AQCTLA.bit.CAD = AQ_SET; //Action when achieve counter down value (set in this case)
// PWM 8
EPwm8Regs.TBPRD = EPwm1Regs.TBPRD; //Same period of PWM 1
EPwm8Regs.TBPHS.bit.TBPHS = 0; //No Phase shift (0 degrees)
EPwm8Regs.EPWMSYNCINSEL.bit.SEL = SYNC_IN_SRC_SYNCOUT_EPWM1;
EPwm8Regs.TBCTR = 0x0000; //Clear counter
EPwm8Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; //Count up/down
EPwm8Regs.TBCTL.bit.PHSEN = TB_DISABLE; //Enable phase shift
EPwm8Regs.TBCTL.bit.PHSDIR = TB_DOWN; //Phase shift direction (positive)
EPwm8Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; //Prescale high speed clock
EPwm8Regs.TBCTL.bit.CLKDIV = TB_DIV1; //Prescale low speed clock
EPwm8Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; //Avoid multiples switching
EPwm8Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO_PRD; //Refresh duty cycle on top and base of triangular wave
EPwm8Regs.AQCTLA.bit.PRD = AQ_NO_ACTION; //Action when achieve PRD value (no action in this case)
EPwm8Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION; //Action when achieve zero value (no action in this case)
EPwm8Regs.AQCTLA.bit.CAU = AQ_CLEAR; //Action when achieve counter up value (clear in this case)
EPwm8Regs.AQCTLA.bit.CAD = AQ_SET; //Action when achieve counter down value (set in this case)
// End Setup
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1; //Conclude synchrony with others PWM
EDIS; //End edition
}
