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TMS320F28388D: SPI Clocking Schemes

wangbengang
Prodigy 40 points

Part Number: TMS320F28388D

Hi:

The following is an introduction to SPI  Clocking Schemes in the 《TMS320F2838x Real-Time Microcontrollers With Connectivity Manager》

1. In the picture, whether the red circle is the receiving data latch position?

2.If it is，such the Falling edge without delay Mode.In this mode, CLKPOLARITY = 1 , CLK_PHASE=0。This configuration means that the default voltage is 1 and data is latch at the first edge. But the sequence in the diagram is latched on the second edge. Is my understanding correct? Or this SPI is different than the others.

  • 0
    TI__Mastermind 19655 points

    Hi, apologies for the delay.

    1. The red circles are indeed showing the receiving data latches at each cycle.

    2. The latch occurs in that way because the data is received on the rising edge and shifted out on the falling edge. In addition, there is a note that tells us each cycle represents the previous data bit which is important to know.

    Regards,

    Aishwarya