Part Number: TMS320F28377D
Other Parts Discussed in Thread: TMS320F28375D
[Question]
・When accessing the EMIF1_CS2n area(0x10_0000～0x2F_FFFF), is the EM1A[19:0] output a 16-bit address?
・The output of EM1A[19] was not shifted 1 bit from the 22-bit CS2n area address (0x10_0000 to 0x2F_FFFFF).Is the CPU to EM1A output conversion subtracting the CS2n offset address(0x0010_0000)?
[Setting]
Access method and settings used when checking operation in actual operation.
・EMIF for Asynchronous Accesses
・EMIF1_CS2n area access setting
・EM1D is 32-bit data access (ASYNC_CS2_CR.ASIZE=0b10)
[Description in the manual]
→ TMS320F2837xD Dual-Core Microcontrollers Technical Reference Manual
25.5.6.1 Interfacing to Asynchronous Memory
The EM1A output can be read as a 32-bit unit address from the description.
[actual operation]
For EMIF1_CS2n area access, EM1A[19:0] is considered to be converted and output as shown in the following figure
The following is an example of an actual operation check pattern.
→ TMS320F2837xD Dual-Core Microcontrollers Technical Reference Manual
→tms320f28375d.pdf
Table 25-17. Description of the Asynchronous m Configuration Register (ASYNC_CSn_CR)
The EM1A[19:0] output for CS2n access does not change when ASIZE setting changed.
