TMS320F28388D: TMS320F28388D

Hi, 

 The Ethernet clock and the MDIO signals are configured by the C28x core . I am yet to figure out why a reset to CM core could cause any changes to thiese onfigurations. Also, if these changes are affected, then it should not have worked completely.

Best Regards

Siddharth 

why I am trying to reset the CM Core is mainly due to entering Hardfault ISR (looks like Preciserr), so If I can track down  why it hangs in this ISR I could omit resetting the CM Core which would solve the problem, I have tried to track down the reason for this from my end without any success, I am attaching the relevant snippets of the registers at that point of time, I hope with your expertise you could see directly what is going wrong and give a solution. we couldn't simply single step through the code, because the code runs without any problem for couple of minutes before it hangs, and the successful run time is variable and like 5 to 6 minutes on average.Ethernet frames are also successfully recieved on the PC end untill the Hardfault happens.
If u need more info kindly let me know.

#include "Ethernet_CM_Hella.h"
#include "driverlib_cm.h"
#include "cm.h"

const u32 numWords = (Ethernet_CM_TX_PACKET_LENGTH - 16) / 4; // Subtract 16 for the 4 MAC address words
#define  NO_bytes_to_copy_u32    32 // (numWords * sizeof(u32))
#define Eth_src_addr_u32          (void *)((uintptr_t)pData + 14)
//debug flag
u8 flag_place_corrupt_u8 = 0;

//#pragma DATA_SECTION(rxBuffer, "MSGRAM_CM_TO_CPU1");
u8 Ethernet_CM_rxBuffer_u8[Ethernet_CM_NUM_PACKETS*Ethernet_CM_TX_PACKET_LENGTH];

#pragma DATA_SECTION(Ethernet_CM_xcp_command_u8, "MSGRAM_CM_TO_CPU1");
 u8 Ethernet_CM_xcp_command_u8[32];


u8 Ethernet_indexWriteTx_u8=0;
u8 Ethernet_indexReadTx_u8=0;
u8 Ethernet_indexWriteRx_u8=0;
u8 Ethernet_indexReadRx_u8=0;
u8 Ethernet_buffIndex_u8=0;
u32 i=0;
u32 MSG_RAM_ADDR_u32 = 0x20080118 ;  // address calculated value for MSG RAM location for CM , for same location C28x_1 has a different value
u8 Ethernet_indexMaxTx_u8 = ETHERNET_DESCRIPTORS_NUM_TX_PER_CHANNEL;
u8 Ethernet_CM_indexMaxRx_u8=(ETHERNET_DESCRIPTORS_NUM_TX+ETHERNET_DESCRIPTORS_NUM_RX_PER_CHANNEL);


//
//This is a light weight implementation for sending a packet over Ethernet
//It does not maintain any software queue for the packets
//
inline void Ethernet_SendPacket(u8 *pData,u32 length)
{
  //  CM_reset();


    Ethernet_descArray[Ethernet_indexWriteTx_u8].des0 = (u32)pData;
    Ethernet_descArray[Ethernet_indexWriteTx_u8].des1 = 0;
    Ethernet_descArray[Ethernet_indexWriteTx_u8].des2 = (ETHERNET_TX_DESC_IOC|length);
    Ethernet_descArray[Ethernet_indexWriteTx_u8].des3 = (ETHERNET_DESC_OWNER |
                                             ETHERNET_PKT_FLAG_SOP |
                                             ETHERNET_PKT_FLAG_EOP);
    Ethernet_writeTxDescTailPointer(EMAC_BASE,
                                    ETHERNET_DMA_CHANNEL_NUM_0,
                                    (Ethernet_HW_descriptor *)
                                     (&Ethernet_descArray[Ethernet_indexWriteTx_u8]));

   // GPIO_togglePin(GPIO_PIN_13_TOGGLE_CM);

    //
    //End check for last descriptor
    //
    if(++Ethernet_indexWriteTx_u8 == ETHERNET_DESCRIPTORS_NUM_TX_PER_CHANNEL)
    {
        Ethernet_indexWriteTx_u8 = 0;
    }

    flag_place_corrupt_u8=1;
}


//
// IPC ISR for Flag 0.
// C28x core sends data without message queue using Flag 0
//
void IPC_ISR0()
{




    //  GPIO_togglePin(GPIO_PIN_13_TOGGLE_CM);

//    IPC_Instance[IPC_CM_L_CPU1_R].IPC_Flag_Ctr_Reg->IPC_SET = IPC_FLAG25;

    *((u32 *)pData ) = 0x733BE4F8;//0xDAFD8CA0;//0xDAFD8CA0  //PC MAC Addr   // 0x733BE4F8 - for USB to ETH Adapter
    *((u32 *)pData + 1)  =0x02011958; //0xFFFF19BE //PC MAC Addr      // 0xFFFF1958 -USB ADAPTER
    *((u32 *)pData + 2 ) =0x03040605;
    *((u32 *)pData + 3)  =0x0000FFFF;



//    for (i = 4; i < Ethernet_CM_TX_PACKET_LENGTH / 4; i++) {
//        // Assuming pData is an array of uint32_t
//        // Assign the content of the memory location pointed to by MSG_RAM_ADDR_u32
//        // to the corresponding element in the pData array
//       // pData[i] = *((uint32_t *)MSG_RAM_ADDR_u32);
//        pData[i] = (u8)0xFFFF;
//    }


    // Use a block copy operation


  memcpy(Eth_src_addr_u32 , (void *)MSG_RAM_ADDR_u32, NO_bytes_to_copy_u32 );
    flag_place_corrupt_u8=2;

    // clear the flag for Mutex unlock for MSG RAM
 //   IPC_Instance[IPC_CM_L_CPU1_R].IPC_Flag_Ctr_Reg->IPC_CLR = IPC_FLAG25;



    GPIO_togglePin(GPIO_PIN_13_TOGGLE_CM);
    Ethernet_SendPacket(pData,Ethernet_CM_TX_PACKET_LENGTH);



    IPC_Instance[IPC_CM_L_CPU1_R].IPC_Flag_Ctr_Reg->IPC_ACK = IPC_FLAG0;


}


//
//Transmit interrupt handler only increments the book keeping variable
//and clears the interrupt can be modified as per needs
//
interrupt void transmitISR(void)
{
    Ethernet_CM_transmitISRCount_u32++;

  //   GPIO_togglePin(GPIO_PIN_13_TOGGLE_CM);
    IPC_Instance[IPC_CM_L_CPU1_R].IPC_Flag_Ctr_Reg->IPC_ACK = IPC_FLAG0;

    Ethernet_clearDMAChannelInterrupt(
                EMAC_BASE,
                ETHERNET_DMA_CHANNEL_NUM_0,
                ETHERNET_DMA_CH0_STATUS_TI
                );
    flag_place_corrupt_u8=3;
}

//
//Receive interrupt handler called when complete packet is received
//
interrupt void receiveISR(void)
{
   // GPIO_togglePin(GPIO_PIN_13_TOGGLE_CM);

    Ethernet_Pkt_Desc *ptrNewPacket=NULL;


    //
    //Clear the interrupt
    //
    Ethernet_clearDMAChannelInterrupt(EMAC_BASE,
                                      ETHERNET_DMA_CHANNEL_NUM_0,
                                      ETHERNET_DMA_CH0_STATUS_RI);


    //
    // Callback - Invoke any application specific callback here
    //Just incrementing the indexRead here we are not consuming the buffers here
    //
    if(++Ethernet_indexReadRx_u8 >= (ETHERNET_DESCRIPTORS_NUM_TX +
                         ETHERNET_DESCRIPTORS_NUM_RX_PER_CHANNEL))
    {
        Ethernet_indexReadRx_u8 = ETHERNET_DESCRIPTORS_NUM_TX;
    }

    //
    //Refill the packet buffer
    //
    if(Ethernet_descArray[Ethernet_indexReadRx_u8].des3 & ETHERNET_DESC_OWNER )
    {

        // Process the received packet in Ethernet_CM_rxBuffer_u8[buffIndex]
        //
        u8* receivedData = &Ethernet_CM_rxBuffer_u8[Ethernet_buffIndex_u8 * Ethernet_CM_TX_PACKET_LENGTH];
        memcpy(Ethernet_CM_xcp_command_u8, receivedData + 14, 32);
        IPC_Instance[IPC_CM_L_CPU1_R].IPC_Flag_Ctr_Reg->IPC_SET = IPC_FLAG0;


        ptrNewPacket = getPacketBuffer();
        Ethernet_descArray[Ethernet_indexWriteRx_u8].des0 =
                    (u32)ptrNewPacket->dataBuffer;
        Ethernet_descArray[Ethernet_indexWriteRx_u8].des1 =0;
        Ethernet_descArray[Ethernet_indexWriteRx_u8].des2 = 0;
        Ethernet_descArray[Ethernet_indexWriteRx_u8].des3 = (ETHERNET_DESC_OWNER |
                                                 ETHERNET_RX_DESC_IOC |
                                                 ETHERNET_RX_DESC_BUF1_VALID);

        if(++Ethernet_indexWriteRx_u8 == ETHERNET_DESCRIPTORS_NUM_TX +
                              ETHERNET_DESCRIPTORS_NUM_RX_PER_CHANNEL)
        {
            Ethernet_indexWriteRx_u8 = ETHERNET_DESCRIPTORS_NUM_TX;
        }
    }

    Ethernet_CM_receiveISRCount_u32++;

        //  IPC_Instance[IPC_CM_L_CPU1_R].IPC_SendCmd_Reg->IPC_SENDDATA = Ethernet_buffIndex_u8;


        //   GPIO_togglePin(GPIO_PIN_13_TOGGLE_CM);
    flag_place_corrupt_u8=4;
}


//
//This generic ISR handles only the Early Rx completion interrupt
//If Early Transmit interrupt needs to be handled it can be added here as well
//
interrupt void genericISR(void)
{

    Ethernet_CM_genericISRCount_u32++;


    //
    //Clear the interrupts at hardware
    //
    Ethernet_clearDMAChannelInterrupt(
                        EMAC_BASE,
                        ETHERNET_DMA_CHANNEL_NUM_0,
                        ETHERNET_DMA_CH0_STATUS_ETI |
                        ETHERNET_DMA_CH0_STATUS_AIS|
                        ETHERNET_DMA_CH0_STATUS_TPS
                        );
    Ethernet_clearDMAChannelInterrupt(
                EMAC_BASE,
                ETHERNET_DMA_CHANNEL_NUM_0,
                ETHERNET_DMA_CH0_STATUS_ERI | ETHERNET_DMA_CH0_STATUS_NIS | ETHERNET_DMA_CH0_STATUS_TBU
                |ETHERNET_DMA_CH0_STATUS_TI | ETHERNET_DMA_CH0_STATUS_RI   |  ETHERNET_DMA_CH0_STATUS_RBU |
    ETHERNET_DMA_CH0_STATUS_RPS   | ETHERNET_DMA_CH0_STATUS_RWT |   ETHERNET_DMA_CH0_STATUS_FBE  |  ETHERNET_DMA_CH0_STATUS_CDE |
    ETHERNET_DMA_CH0_STATUS_TEB_S  |  ETHERNET_DMA_CH0_STATUS_TEB_M  |  ETHERNET_DMA_CH0_STATUS_REB_S  |  ETHERNET_DMA_CH0_STATUS_REB_M );
    flag_place_corrupt_u8=5;
}

//
//This is a simple implementation of Buffer management it returns
//a new buffer pointer from the given packet buffer pool
//
Ethernet_Pkt_Desc *getPacketBuffer(void)
{
    tempDescriptor.dataBuffer = &Ethernet_CM_rxBuffer_u8[Ethernet_buffIndex_u8++ * Ethernet_CM_TX_PACKET_LENGTH];
    if(Ethernet_buffIndex_u8 == Ethernet_CM_NUM_PACKETS)
    {
        Ethernet_buffIndex_u8= 0;
    }
    Ethernet_CM_getBufferCount_u32++;
    flag_place_corrupt_u8=6;
   return &tempDescriptor;

}

Hi, 

Do you mean that every time it runs successfully only for  5 to 6 minutes before it causes a hard fault? Is this repeatable everytime. 

Will take a look at the code and get back to you.

Best Regards

Siddharth

Hi,
Yes, it runs without any problem for some minutes (on average 5 to 6 mins) before it causes the Hard fault (Ethernet frames are received on PC  until hard fault occurs) and this is repeatable every time.
Best Regards .
Nirojan

I was thinking that it worked fine but only in some cases, you had to reset the core.  If it is repeatable and works only for few minutes, then it looks to be a memory handling issue.  Are you seeing any memory leak or stack overflow which might be causing the hard fault?

Best Regards

Siddharth

Hi Siddharth,

Thank you for your response and valuable insights into the issue we're facing with our project. I appreciate your assistance in helping us resolve this matter.

I've taken screenshots of the stack usage window, memory allocation window, and the project property settings for stack size . However, I'm unsure about how to pinpoint the exact issue based on these screenshots alone.

Would it be possible for you to provide some guidance on how to interpret the information from these screenshots and where to look for potential memory leaks or stack overflow issues, and how to correct them? Additionally, if there are any specific thresholds or patterns that we should be aware of, it would be incredibly helpful to know.

Alternatively, if you have any documentation or reference materials that delve into this topic in more detail, I would greatly appreciate it if you could share them with us. This would help us gain a better understanding of memory handling and debugging in our project.

Best Regards,
Nirojan

Nirojan,

Few things that you can check

1. Stack Pointer and stack size -  Check if the stack pointer is still in valid stack region when the hard fault occurs

2. Try increasing the heap size .

3. Check for the function call history and see which function causes the hard fault. 

This will help in narrowing down the issue.  

Also, pls let us know if you are using any Ethernet stack or only the Ethernet drivers. 

Best Regards

Siddharth