TMS320F28386D: I2C bus hangs(SDA hangs)

Hello,

Just to verify, are the I2C pins pulled-up? Does your project require you to have the watchdog reset the device or would it satisfy your requirements to have an interrupt be serviced instead?

Best regards,

Omer Amir

No, the slave holds the SDA as low, the above picture shows.

I got the answer from history question. 

I want to know that does TI have the driverlib interface to recover this I2C issuse, or other recommend method to recover?

This is in CM core I2C.

Hello,

The CM I2C is not the same as the I2C that's normally part of a C2000 device's hardware, so I'm not as familiar with it. I will check this with the design team to see if there is something in hardware that does what you are describing.

Best regards,

Omer Amir

Thanks, wait for reply

Thanks for your patience, I will try to let you know by the end of the week once I get a response.

In CPU2, We face the same problem. C28 core. I also need information .

Does TI have the driverlib interface to recover this I2C issuse, or other recommend method to recover?

Hello,

I believe you should be able to use the IRS bit in the I2CMDR register for the C28x I2C.

I will note that in both these cases, CM I2C and C28x I2C, you will likely be doing some polling to determine if the I2C bus is for some reason. Is this part of your program?

Also for another point, are you expecting the WD to reset the device or was this just something that happened? I'm curious why the WD was enabled and caused a reset during an I2C transmission without being serviced.

Best regards,

Omer Amir

Just something that happened.

It is the design, for some special cases that will trigger watchdog reset.

When watchdog reset happen, in the same time, the I2C communication is onging. This reset makes the I2C communication unexpected stopped.

The slave holds the SDA line, even F28386 is reboot, and try to do the write and read operation with the slave. But the SDA is holding low. Make the IIC communication  cannot happen.

So need to recover the slave, make it release the SDA line.

Hello,

W Z said:

But the SDA is holding low.

I'm not sure you quite answered my question on this before, do you have a pullup resistor on the I2C pins? This is required for I2C.

Best regards,

Omer Amir

Yes, It has pullup resistor to 3.3V Power.

Hello,

I talked with one of the design experts regarding this, and he informed me that when the CM I2C is used as master and the device itself goes into reset, if the target was controlling SDA and it was low, then CM I2C as master can't start a fresh transaction. Because the target I2C doesn't have a reset, this is why you see the bus hang situation.

Best regards,

Omer Amir

Ok. Thanks. 

Could you please help communicate with IIC expert about the below method?

Sorry, I need context for this post. Can you please link it so I can see what device it is?

Sorry, I cannot find that ticket now.

But the below is the same question with me.

I don't know if this is the same I2C as the Connectivity Manager's I2C on the F2838x device (keep in mind that the CM I2C and the normal I2C are not identical). There is no reset on the CM I2C available, but I'm checking with a design expert if there may be a workaround through software or some other means. I will try to respond early next week if I get a response from them.

I am following this question, due to this is the urgent bug of product.

I'm still trying to confirm this with the design expert, they have not gotten back to me with a workaround yet (I'm actively emailing them every day).

Thanks a lot!

No problem, I will update you once I get a response.

The experts recommended using the I2CMRIS CLKRIS to see the status of the clock timeout interrupt. You can program the timeout value using the I2CMCLKOCNT register.

When enter into the I2C error status, I call the I2C_setMasterClkTimeout(I2C0_BASE,0x7d);

But cannot recover. It just make the CLK from High to low.

But SDA keeps low as error status.

You can refer to the Clock Low Time-out (CLTO) section of the CM I2C chapter in the reference manual for more information on this, but this is something that you will need to handle in your application. By configuring the clock low time-out, you can then use the CLKRIS status I mentioned before to have your application code handle this error. I've included a short snippet of the section below for reference, but it might be more helpful to read this in its entirety from the manual: