TMS320F280037: TMS320F280037 Sysconfig not changing clock setting

ahugron hugron

Part Number: TMS320F280037
Other Parts Discussed in Thread: SYSCONFIG

Hi,

I am using a external crystal OSC at 16MHz. Previously develop with Launchxl 39C, I modify the project to our board using a F280037 with a 16MHz (instead of 20MHz from launchXL).

I change the sysconfig clock tree to use an external 16MHz clock, change PLL_IMULT to 15 to get the same PLLRAWCLK as before but PWM and clock are still off.

Even if I change the PLL_IMULT to a different value, PWM and timer are still same frequency.

Why I cannot set the clock tree correctly?

Thanks,

Arnausd

over 2 years ago

0 Vince over 2 years ago

TI__Mastermind 19795 points

Hi Arnausd,

Thanks for your question. Could you verify what clock dividers are occurring in the Sysconfig device.h file? That may be cause for this.

I've contacted the ePWM software expert to help with this.

Regards,

Vince

0 ahugron hugron over 2 years ago in reply to Vince

Intellectual 330 points

device.h

#define DEVICE_OSCSRC_FREQ 20000000U is still 20 not 16MHz

// To use INTOSC as the clock source, comment the #define USE_PLL_SRC_XTAL,
// and uncomment the #define USE_PLL_SRC_INTOSC
//
#define USE_PLL_SRC_XTAL
//#define USE_PLL_SRC_INTOSC

#if defined(USE_PLL_SRC_XTAL)
//
// 20MHz XTAL on controlCARD is used as the PLL source.
// For use with SysCtl_getClock().
//
#define DEVICE_OSCSRC_FREQ 20000000U

//
// Define to pass to SysCtl_setClock(). Will configure the clock as follows:
// PLLSYSCLK = 20MHz (XTAL_OSC) * 48 (IMULT) / (2 (REFDIV) * 4 (ODIV) * 1(SYSDIV))
//
#define DEVICE_SETCLOCK_CFG (SYSCTL_OSCSRC_XTAL | SYSCTL_IMULT(48) | \
SYSCTL_REFDIV(2) | SYSCTL_ODIV(4) | \
SYSCTL_SYSDIV(1) | SYSCTL_PLL_ENABLE | \
SYSCTL_DCC_BASE_0)

//
// 120MHz SYSCLK frequency based on the above DEVICE_SETCLOCK_CFG. Update the
// code below if a different clock configuration is used!
//
#define DEVICE_SYSCLK_FREQ ((DEVICE_OSCSRC_FREQ * 48) / (2 * 4 * 1))