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TMS320F28388D: A few questions about Missing Clock Detection

AndyP
Expert 1786 points
Part Number: TMS320F28388D


Hi,

I would be grateful if someone could clarify some things about Missing Clock Detection unit.

1. Is it possible, that when MCD is disabled on CPU1 (by using the SysCtl_disableMCD driverlib function), the CM still can generate NMI with Clock Failure as the cause?

2. Is there only one instance of the MCD unit in the device? I'm asking this because the SysCtl_disableMCD driverlib function can also be called from the CPU2 core. What is the effect of calling this on CPU2? Can CPU2 alter the MCD unit setting in the same way as the CPU1? Or the only master here is CPU1?

Best regards,
Andy

  • +1
    TI__Genius 14325 points

    Hello Andy,

    Thanks for reaching out.

    To answer your first question. There is only one MCD in the device which detects missing clock as compared to INTOSC1(primary clock) as shown in block diagram from TRM.
    So if you disable MCD no Clock fail is generated hence CM wouldn't get it.

    For your second question: MCDCR Register part of CLK_CFG_REGS  and you are correct either CPU can write to it by grabbing the semaphore but it doesn't matter which CPU writes the configuration for MCD it works the same way as I mentioned there is only 1 MCD circuit in device.

  • 0 in reply to Prarthan Bhatt
    Expert 1786 points

    Thank you.