This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

The timing of a reset on sequencer 1 is causing problems

I am using the 28335 in a motor control application and depending on where sequencer 1 is reset, causes problems.

The ADC is setup so that Seq 1 and Seq 2 run independently. i.e. SEQ_CASC = 0

There is a 160KHz PWM that triggers a DMA channel and it triggers an ADC conversion on seq 2 to read and ADC. At the end of a conversion sequence, a second DMA channel is triggered to copy ADC values from seq 2 into a memory location. At the end of 8 conversions, an interrupt is generated. The interrupt is therefore running at 20KHz. This ISR is where the motor control software is. However, the entire code in the ISR only runs every 10KHz using a software divider.

At the begining of the ISR, seq 1 is started, there is calculation done on the results from seq 2 (whose data was DMA'd to memory). By the time this is done, seq 1 is done or should be. The busy bit is checked just in case.

Then the motor control software runs.

Then seq 1 is reset.

If seq 1 is reset within around 10us, the motor spins fine. If there is any delay, for example, I inserted a 5us delay, the motor control go crazy and the motor spins very roughly.

This behaviour goes away if A) the delay is removed or B) seq 1 is reset just prior to starting the sequencer. Removing the delay is only a temporary fix as I will be adding code to the motor control which will extend the time it will take to get to the line of code that resets seq 1. Resetting the sequencer just before starting is OK but there must be something going on that shouldn't be and it will come back to cause me trouble later. I want to understand what is going on.

Unfortunately I do not know exactly what is happening when the motor runs rough but it seems that somehow, resetting seq 1 is affecting seq 2. But if SEQ_CASC is set to zero, how could this be?

Any other ideas of what I may be overlooking?

  • If you are inserting a hard delay in the code, it may be interfering with other (periodic) tasks trying to run in parallel.

    When are the values from seq1 used?

    Also, rather than running the ADC based on code execution, it may be better to sample the ADC periodicially using PWM based triggers.

  • Thasnk for the response.

    There is only one ISR in the system. There is a mainloop running but there is no time sensitive code running there.

    Sequencer B is trigger off a chain from DMA and PWM and that generates the interrupt where I need to read sequencer A and I need to make sure A has the latest values. That is why I trigger it manually. It just doesn't make sense why resetting it at the end of the ISR causes problems but resetting it at the beginning just before I trigger a conversion doesn't.

    Thanks