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TMS320F28P650DK: DevCfgRegs for CPU selection

Irene Boben
Expert 1030 points

Part Number: TMS320F28P650DK

Hi Team,

DevCfgRegs are accessible by both CPU1 and CPU2. As an example : 

In CPU1 I have DevCfgRegs.CPUSEL0.bit.ePWM1 = 1 -> which means access is with CPU2

and same register in CPU2 says DevCfgRegs.CPUSEL0.bit.ePWM1 = 0 -> which means access is with CPU1. Which core would have the access in this case?

Kind regards,

Irene

  • 0
    TI__Mastermind 39700 points

    Hi Irene,

    The last peripheral assignment will determine which core has write access.  In the case above, I'm assuming that DevCfgRegs.CPUSEL0.bit.ePWM1 = 1 happens first, then DevCfgRegs.CPUSEL0.bit.ePWM1 = 0 executes afterwards.  In this case, CPU1 will have the write access to EPWM1 registers.

    Best regards,

    Joseph