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TMS320F280037: Analog input affected by digital pin activity

Alecsandru Neacsu
Prodigy 190 points
Part Number: TMS320F280037


We encountered the following problem:

On TMS320F280039CSPM, package PM - 64-pin, silicon revision "0":

When we apply an external digital signal on pin 37, the analog inputs on pins 18, 20, 23 and 24 are perturbed, as follows:

When digital pin voltage becomes higher than ~2.2V, the analog pin is also pulled high.

The measured pull-up current is ~80 microAmpere.

The phenomena is a DC issue, not an AC transient problem.

Depending on external circutry on analog pin(s), the voltage excursion due to perturbance can be as high as ~1V (when external impedance is ~10 KiloOhm )

This happens also while processor is kept in hard reset (by pulling pin 3 low).

Any idea what could be the reason and/or solution?

  • 0
    TI__Mastermind 38940 points

    Hi Alecsandru,

    1.) Can you describe the state of the device (F280037) when you observe this?  Is the application code running (i.e. - configuring pin 37 as GPIO input and ADC is configured enabling pins 18, 20, 23 and 24 to convert)

    2.) On the ~1V difference in the analog pins, is this measured when the ADC is converting or is this measured by a voltmeter/scope?

    Regards,

    Joseph 

  • 0 in reply to Joseph Casuga
    Prodigy 190 points

    Initially we had code running, but trying to pinpoint the problem we are now in the situation that the processor in held in reset. We toggle externally pin 37 (0 ... 3.3v), and we measure by ampermeter the current flowing from analog input pin(s) to GND. Or, alternatively, we measure by voltmeter the voltage(s) on analog pin(s). All affected analog pins are connected to resistive circuits, i.e. the source impedances are high (>= KiloOhm range).

    When pin 37 is logic low (or, more precisely, below ~2.2v), the values read are according to expectations, as imposed by external resistive circuits (i.e. analog input is high impedance). When voltage on pin 37 is logic high, there is a step in both current and voltage on all mentioned analog pins (which by the way appear to have in common a multiplexer going to CMPSS).

    Until now this phenomena appears on 2 boards. We intend to repeat the check on TI starter kit, even if it uses a different chip (100-pin '0039). And we'll struggle to keep processor in reset, as reset pin is not brought outside of board.

  • 0 in reply to Alecsandru Neacsu
    TI__Mastermind 38940 points

    In normal operation, when device is not in reset mode, the behavior that you have described where a digital pin is driven to valid logic 1 or 0, analog pins are not expected to be disturbed.  Did you have the same observation when device is normal operating mode and not held in reset state?

  • +1 in reply to Joseph Casuga
    Prodigy 190 points

    Problem solved:

    It was a design error on our board, combined with the behavior below. So, there is no need to follow-up this thread, problem is solved.

    CONCLUSION:

    If an analog pin is (by error) exposed to voltage above VDDA (typically 3.3V), then it starts influencing other analog pins connected to the same CMPSS mux. Influence includes pulling current from analog pin(s) to GND and/or 3.3V - but this happens only if (another) analog pin is overdriven above VDDA.

    Of course, voltages above VDDA are clearly forbidden by datasheet, so this was a design error.

    Interesting to know, this phenomena happens with processor in reset, and is a DC phenomena - good to know for whom may encounter it.