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TMS320F28388D: ADC Reference Model

Jennifer Stander
Intellectual 510 points
Part Number: TMS320F28388D

Hi,

I have watched the video on Developing the SAR reference input model. 

https://www.ti.com/video/series/precision-labs/ti-precision-labs-analog-to-digital-converters-adcs.html

I was able to model the switching rates, resistance and capacitance values from the datasheet. 

If I am running at 50 MHz, how much time per bit period should be spent charging the capacitor to the reference voltage and how much time does the voltage get held for and then how much time is spent discharging the capacitance. 

I ask only because when I simulate with the OPAx320 model and the recommended decoupling, the capacitor does not fully charge to the reference voltage during the sampling period and this seems unexpected. 

If you have a ADC reference pin spice model that might work better that would also resolve the ticket. 

Thank you,

Jennifer

  • 0
    TI__Mastermind 37820 points

    Hi Jennifer,

    Check out the IBIS model on F28388D product folder in ti.com .  Under Design and Development tab, you should see the IBIS models.  The models include the R, C and leakage and other information on the VREFHI reference pins.

    As for the sampling capacitor charring requirement, the minimum time to charge (provided that there are NO huge series source impedance and NO large source capacitance) is 75ns for 12-bit mode and 320ns for 16-bit mode.

    Best regards,

    Joseph

  • 0 in reply to Joseph Casuga
    Intellectual 510 points

    I have the R and C values from the datasheet. I am looking at transient effects of the reference pins to select external circuits as described in the video. The 75 and 320 nsec numbers are for the signal input path not the reference pin. I am not going to pursue this further, thank you for your response.