TMS320F28388D: GPIO muxing for High Speed Mode SPI

Michel Donadon

Part Number: TMS320F28388D

Hello Everyone,

I need to run SPI-A @40MHz. I saw there is the chance to enable the High Speed Mode for a restricted number of pins:

GPIO58 SPISIMOA   GPBGMUX2[21:20]=11b   GPBMUX2[21:20]=11b
GPIO59   SPISOMIA   GPBGMUX2[23:22]=11b   GPBMUX2[23:22]=11b
GPIO60   SPICLKA    GPBGMUX2[25:24]=11b   GPBMUX2[25:24]=11b
GPIO61   SPISTEA     GPBGMUX2[27:26]=11b   GPBMUX2[27:26]=11b

I am then using this configuration without issues, but my application requires two different chip selects (both related to devices requiring 40MHz SPI clock).

Thus, I alternatively configure GPIO61 and GPIO57 as SPISTEA depending on the device I want to talk to. It seems that the SPI keeps doing well even if the GPIO57 is not in the group of the high speed mode GPIOs.

Does this mean that the SPISTE can actually be whatever regardless of the high speed mode? Can I rely this configuration is safe to use?

Thank you in advance, regards.

Michel

over 1 year ago

+1 Aishwarya Rajesh over 1 year ago

TI__Genius 15225 points

Hi Michel,

While technically only GPIO 58-61 are configured for high-speed mode like you mentioned, since SPIA as a whole is in high-speed mode(HS_MODE = 1), it seems that it is possible to use GPIO57 when toggling between CS. As long as you are not also planning on toggling between SPISIMOA/SOMIA/CLKA, it should be okay. I would just make sure you are aware of the following information from the SPI TRM section related to this mode, if you aren't already: