Part Number: TMS320F28377D
Dear champs,
I am asking this for our customer.
From Table 4-11. Boot ROM Reset Causes and Actions of 4.9.1 Reset Causes and Handling in TRM,
it seems there are RAM initialization on CPU1/CPU2 when there is watchdog reset (WDRS), unlike F28004x, where RAM initialization is not on WDRS.
Questions:
1. Is our understanding above correct?
2. If yes, how does the user not initialize RAM to zero with software reset like WDRS?
3. If the user changes F2837xRevB_c1rom_SafeZoneCodeSymbols_fpu32.lib from COFF to EABI format for SCCRESET, does it work as a workaround for this case? If it works, can TI provide it in EABI?
