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F2808 SPI

Todd Anderson78572
Guru 14640 points


All:

I have taken the SPI-loopback example and created a SPI-master on SPI-A and a SPI-slave on SPI-B in order to debug some code before including into product code. Because the product code is doing I/O expansion using SPI and it is "output only," I was able to create a 2-wire interface - using SPICLK and SPISIMO.

I am using an eZdsp2808, and my connections were

GPIO18/SPICLKA (P8-25)  to  GPIO14/SPICLKB (P8-5)

GPIO16/SPISIMOA (P8-23) to GPIO12/SPISIMOB (P8-37)

Minimal changes were required to the existing code to do this.

One thing I found that was a little odd - in order the the SPI-B to work in slave mode, I needed to comment out the line that Configured the SPISTEB - I did not even connect a line to this port bit, but if it was configured, the information did not get into the slave receive buffer.

Also, I noticed that the example code initializes the FIFO - if the FIFO is not used, is this necessary?

Regards,

Todd Anderson

  • 0
    TI__Expert 3760 points

    Todd:

    1. For the SPI in slave mode to receive data properly, it needs to detect an active low on the SPISTE pin.
      1. This allows for multiple slaves to receive data from a single master only when the master has pulled a particular slave's slave select line low.
    2. What is likely happening is - when you configure the GPIO pin for SPISTEB operation, the SPI-B (slave) is not receiving data because you have not tied SPISTEB pin to ground (likely there is a pull-up enabled on that pin and it is high, preventing the slave from receiving data).
    3. On the other hand, when you did not configure the SPISTE pin for a GPIO at all, the SPI slave module reads a default "low" on the SPISTE logic.
    4. I have not checked the actual behavior, but I believe an active low on SPISTE it is required regardless of whether the FIFO is used or not.