TMS320F28069: Digital Compare unit - Sampling of signal

Part Number: TMS320F28069

Hi,

With reference to this attached thread, Is there any way to sample the signal for a higher period let's say 200 clk cycles or if the window can be multiplied over a certain ZERO to TBCLKPRD.

The application I want it for is very similar, Wherein the glitch can occur at any window with 200 clock cycles wide. Let's say it is present only for 100 cycles then I'll have to ignore it as a false signal. 

Filtered glitch issue in PWM Digital Compare Module