TMS320F280039C: motor jitter problem

Ben Qin

Part Number: TMS320F280039C

Hi Team,

There's an issue from the customer need your help:

Previously, the motor control motor with 0049 had been normal, but after transplanting to 0039, the motor speed jitter began to appear, and the analysis was an AD sampling problem.

Re-drew the board, the phenomenon is still the same, the following is the initialization program of the ADC, to help see if there are any errors:

void InitSetAdc(Uint type)
{
volatile Uint waite;
int trigsel;


trigsel = 5;


//EALLOW;
#define ANALOGSUBSYS_BASE 0x0005D700U
ADC_setVREF(ANALOGSUBSYS_BASE, 0, 0);
//AnalogSubsysRegs.ANAREFCTL.bit.ANAREFSEL = 0; // 内部基准,1.65(0~3.3V)
//AnalogSubsysRegs.ANAREFCTL.bit.ANAREFBSEL = 0;
//AnalogSubsysRegs.ANAREFCTL.bit.ANAREFCSEL = 0;
EALLOW;
AdcaRegs.ADCCTL2.bit.PRESCALE = 0x02;
AdcbRegs.ADCCTL2.bit.PRESCALE = 0x02;
AdccRegs.ADCCTL2.bit.PRESCALE = 0x02;

AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1; All analog circuitry inside the core is powered up
AdcbRegs.ADCCTL1.bit.ADCPWDNZ = 1;
AdccRegs.ADCCTL1.bit.ADCPWDNZ = 1;
//================================================================================================================

============================================================================================================================================================================================================== waite<5000; waite++){} //Delay
//------------------------------------------------------------------------------------------------
asm(" RPT #28 || NOP"); Two ADCCLKs are required; Delay of 28 empty cycles
/
/ Start setting the ADC's control registers, conversion channel selection registers, etc.
AdcaRegs.ADCBURSTCTL.bit.BURSTEN
= 0; SOC Burst Mode Enable
AdcbRegs.ADCBURSTCTL.bit.BURSTEN = 0; SOC Burst Mode Enable
AdccRegs.ADCBURSTCTL.bit.BURSTEN = 0; SOC Burst Mode Enable

//AdcaRegs.ADCOFFTRIM.all = 0;
//AdcbRegs.ADCOFFTRIM.all = 0;
//AdccRegs.ADCOFFTRIM.all = 0;

AdcbRegs.ADCINTSEL1N2.bit.INT1SEL = 4; Channel 3 conversion completes and produces interrupt
ADCINT1 if (0 == type)
{
AdcbRegs.ADCINTSEL1N2.bit.INT1E = 1; } ADCINT1 is enabled
}
else
{
AdcbRegs.ADCINTSEL1N2.bit.INT1E = 0; ADCINT1 is disabled
}
AdcbRegs.ADCINTOVFCLR.bit.ADCINT1 = 1;

#define ADC_IW_A2 0x02 // IW A2
#define ADC_AI4_A5 0x05 // AI4 A5
#define ADC_VV_A6 0x06 // VV A6

#define ADC_IU_B2 0x02 // IU B2
#define ADC_VDC_B5 0x05 // VDC B5
#define ADC_AI5_B8 0x08 // AI5 B8
#define ADC_AI6_B9 0x09 // AI6 B9
#define ADC_IV_B11 0x0B // IV B11

#define ADC_UV_C0 0x00 // UV C0
#define ADC_AI1_C2 0x02 // AI1 C2
#define ADC_TD_C3 0x03 // TD C3
#define ADC_WV_C4 0x04 // WV C4
#define ADC_AI2_C5 0x05 // AI2 C5

#define ADC_ACQPS 2
//********************************ePWM1 ADCSOCA触发，
AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdcaRegs.ADCSOC2CTL.bit.CHSEL = ADC_IW_A2; // 18:15 SOC0 Channel Select
AdcaRegs.ADCSOC0CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
/*
AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdcaRegs.ADCSOC1CTL.bit.CHSEL = ADC_IW_A2; // 18:15 SOC0 Channel Select
AdcaRegs.ADCSOC1CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
AdcaRegs.ADCSOC2CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdcaRegs.ADCSOC2CTL.bit.CHSEL = ADC_IW_A2; // 18:15 SOC0 Channel Select
AdcaRegs.ADCSOC2CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
AdcaRegs.ADCSOC3CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdcaRegs.ADCSOC3CTL.bit.CHSEL = ADC_IW_A2; // 18:15 SOC0 Channel Select
AdcaRegs.ADCSOC3CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
*/
AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdcaRegs.ADCSOC1CTL.bit.CHSEL = ADC_AI4_A5; // 18:15 SOC0 Channel Select
AdcaRegs.ADCSOC1CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
AdcaRegs.ADCSOC2CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdcaRegs.ADCSOC0CTL.bit.CHSEL = ADC_VV_A6; // 18:15 SOC0 Channel Select
AdcaRegs.ADCSOC2CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale

AdcbRegs.ADCSOC0CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdcbRegs.ADCSOC2CTL.bit.CHSEL = ADC_IU_B2; // 18:15 SOC0 Channel Select
AdcbRegs.ADCSOC0CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
/*
AdcbRegs.ADCSOC1CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdcbRegs.ADCSOC1CTL.bit.CHSEL = ADC_IU_B2; // 18:15 SOC0 Channel Select
AdcbRegs.ADCSOC1CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
AdcbRegs.ADCSOC2CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdcbRegs.ADCSOC2CTL.bit.CHSEL = ADC_IU_B2; // 18:15 SOC0 Channel Select
AdcbRegs.ADCSOC2CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
AdcbRegs.ADCSOC3CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdcbRegs.ADCSOC3CTL.bit.CHSEL = ADC_IU_B2; // 18:15 SOC0 Channel Select
AdcbRegs.ADCSOC3CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
*/
AdcbRegs.ADCSOC1CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdcbRegs.ADCSOC1CTL.bit.CHSEL = ADC_VDC_B5; // 18:15 SOC0 Channel Select
AdcbRegs.ADCSOC1CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
AdcbRegs.ADCSOC2CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdcbRegs.ADCSOC0CTL.bit.CHSEL = ADC_AI5_B8; // 18:15 SOC0 Channel Select
AdcbRegs.ADCSOC2CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
AdcbRegs.ADCSOC3CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdcbRegs.ADCSOC3CTL.bit.CHSEL = ADC_AI6_B9; // 18:15 SOC0 Channel Select
AdcbRegs.ADCSOC3CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
AdcbRegs.ADCSOC4CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdcbRegs.ADCSOC4CTL.bit.CHSEL = ADC_IV_B11; // 18:15 SOC0 Channel Select
AdcbRegs.ADCSOC4CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale

AdccRegs.ADCSOC0CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdccRegs.ADCSOC0CTL.bit.CHSEL = ADC_UV_C0; // 18:15 SOC0 Channel Select
AdccRegs.ADCSOC0CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
AdccRegs.ADCSOC1CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdccRegs.ADCSOC1CTL.bit.CHSEL = ADC_AI1_C2; // 18:15 SOC0 Channel Select
AdccRegs.ADCSOC1CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
AdccRegs.ADCSOC2CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdccRegs.ADCSOC2CTL.bit.CHSEL = ADC_TD_C3; // 18:15 SOC0 Channel Select
AdccRegs.ADCSOC2CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
AdccRegs.ADCSOC3CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdccRegs.ADCSOC3CTL.bit.CHSEL = ADC_WV_C4; // 18:15 SOC0 Channel Select
AdccRegs.ADCSOC3CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
AdccRegs.ADCSOC4CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA
AdccRegs.ADCSOC4CTL.bit.CHSEL = ADC_AI2_C5; // 18:15 SOC0 Channel Select
AdccRegs.ADCSOC4CTL.bit.ACQPS = ADC_ACQPS; // 8:0 SOC0 Acquisition Prescale
AdccRegs.ADCSOC5CTL.bit.TRIGSEL = trigsel; //ePWM1, ADCSOCA

AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;

EDIS;
}

Thanks & Regards,

Ben

over 2 years ago

0 Kevin Allen18 over 2 years ago

TI__Mastermind 45606 points

Hi Ben,

Some questions:

Have they accounted for any system clock differences? F28004x is 100MHz device while F28003x can be run up to 120MHz
Their ACQPS is fairly small being set at 2. Have they tried increasing it?
What hardware are they using? EVMs or custom?
- Are there any differences between the F28004x and F28003x system hardware other than the C2000 devices?
They could compare and verify their ADC sampling performance by running the motor in open-loop control and plotting the sensed data (current / voltage)
- Could try with both F28004x and F28003x systems to compare

Best,

Kevin

0 Ben Qin over 2 years ago in reply to Kevin Allen18

TI__Intellectual 2690 points

Hi Kevin,

The clock difference has been taken into account, and the 28034 and 28335 platforms have not encountered any problems. The hardware is designed by itself. At present, the permanent magnet synchronous motor has no way to operate the motor with pure open-loop. At present, we change to other platform and it is normal with motors.

Best Regards,

Ben

0 Kevin Allen18 over 2 years ago in reply to Ben Qin

TI__Mastermind 45606 points

Hi Ben,

Ben Qin said:
the 28034 and 28335 platforms have not encountered any problems

F2803x / F2833x devices are Gen2 devices and the peripherals are quite different compared to F28004x / F28003x devices.

Ben Qin said:
At present, the permanent magnet synchronous motor has no way to operate the motor with pure open-loop.

OK.

Ben Qin said:
At present, we change to other platform and it is normal with motors.

what do you mean by other platform? Are there any differences between F28004x and F28003x hardware they are using?

They can review the F28004x to F28003x migration guide below, there may be some important differences they need to account for.

https://www.ti.com/lit/spruiw3

Best,

Kevin

C2000™︎ microcontrollers

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TMS320F280039C: motor jitter problem