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TMS320F280025C: issue about instruction ADDF32

Part Number: TMS320F280025C


1. Why can't irrelevant integer division instructions be placed in the delay slot of FPU instructions? Compilation will report an error.

ADDF32 R7H,R6H,R5H

ABSI32DIV32 R2H,R1H,R3H

2. Add a NOP to execute why the results of the two instructions will affect each other. Write the value written in R7H by the addition instruction into R1H to be written by the integer division instruction.

ADDF32 R7H,R6H,R5H

NOP

ABSI32DIV32 R2H,R1H,R3H

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Thanks & Regards

  • Hello Yale,

    1. Why can't irrelevant integer division instructions be placed in the delay slot of FPU instructions? Compilation will report an error.

    What is the error message you're seeing? If the operations aren't using the same floating-point registers then there should not be a problem.

    2. Add a NOP to execute why the results of the two instructions will affect each other. Write the value written in R7H by the addition instruction into R1H to be written by the integer division instruction.

    I'm a little confused by this question, are you asking why adding a NOP affects the results of the two operations? And that the value in R7H is being written to R1H? I don't see this in your code snipped, but this sort of operation would require NOPs for floating-point assembly instructions.

    Best regards,

    Omer Amir